Hi everyone!
I'm trying to do a project using the JESD204 IP. I will eventually be plugging the ADC08DJ3200EVM to the IP, but at the moment I'm only working in simulation and loopback at the moment. I modified the code a little to only send zeroes so to simplify the initial debugging. I'm using the reference design for the zcu1012_8b10b only changing the fpga to a Kintex Ultrascale (KCU105)
The loopback works well, with any signals, but after some time (222us) of simulation, the last 2 byte of each lane are not what they are supposed to be anymore. Those 2 bytes seem to be random, I didn't see any repetition. I control the rx_lane_data and tx_lane_data.
If anyone has idea, it would be welcomed!
Étienne
