ADC12DJ3200EVM: What is the step size for ramp test mode ?

Raj Kumar Ramavath

Part Number: ADC12DJ3200EVM

Hello Experts,

I am using ADC12DJ3200EVM with KCU105. In ramp test mode I am getting the values are 1, 2057, 4113, 6169, and so on. So, could you confirm the test pattern.

JMODE = 10

Device clock = 1250 MHz

Refclk = 78.125 MHz

Sysref = 4.8828125 MHz

K = 16

over 1 year ago

0 Chase W over 1 year ago

TI__Mastermind 20755 points

Hi Raj,

This device ramp mode is not samples ramping, but rather octet's ramping from 0 to 255, and then repeating. Do you have access to look at raw lane data in the ila to confirm the ramp is doing as expected?

Regards, Chase

0 Raj Kumar Ramavath over 1 year ago in reply to Chase W

Prodigy 20 points

Hi Chase W,

Yes, ila is there to see the received ramp data.

Regards,

Raj

+1 Raj Kumar Ramavath over 1 year ago in reply to Raj Kumar Ramavath

Prodigy 20 points

Hi Chase W,

I have verified the samples received in ramp test mode it is 00 to ff is coming and it is the step of 1 which is expected.

Thanks for your time.

0 Chase W over 1 year ago in reply to Raj Kumar Ramavath

TI__Mastermind 20755 points

Hi Raj,

I'm glad you are able to see ramp is as expected. In most devices, the ramp test mode outputs the ramp prior to the transport layer so the ramp appears at a sample level. So when a devices inserts the ramp data after the transport layer leading to ramping by octet, it can be a bit strange looking in the parsed data. If you have any other questions, feel free to ask.

Regards, Chase

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ADC12DJ3200EVM: What is the step size for ramp test mode ?