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DAC9881: Incorrect output signal

Part Number: DAC9881

Hello all,

I am attempting to generate an analog 5-V sine voltage ([-2.5V;+2.5V])  using the DAC9881, but our home-made board yields the signal as in the figure below :

(this is an Excel curve based on data captured on an oscilloscope).

It is a sine wave over one period, but as you can see, it goes abruptly from to +2.5V to -2.5V or from -2.5V to +2.5V several times.

We are pretty sure the code is correct because the same code works when using the DAC9881 Evaluation Module.

Below, the schematics :

I have read the DAC9881 datasheet, and I have noticed a couple of points :

- the same voltage (V5.5 here) is applied to IOVDD and AVDD pins. Is it a problem ? Should AVDD be settled before powering IOVDD ?

- the /LDAC pin is always connected to GND. Is it a problem ?

- The force and sense pins are tied to the same voltage ( (VREFH-F/VREFH-S tied to 5Vref and VREFL-F/VRFEL-S to GNDB). Is it ok ?

Which one of these points would you investigate first ?

Thank you in advance,

Philippe

  • Hi Philippe,

    This really looks like a digital issue with the SPI. Can you capture your data/clock edge relationship and confirm that they match the timing diagram? Can you also ensure that your data format and sign are correct? Maybe you have a bit shift issue here?

  • Hi Paul,

    Thank you for your message. I will investigate the issues you raised.

  • Hi Paul,

    As suggested, we have acquired SPI data (figure below) :

    We would expect to observe the same data on the MISO line at time N as the data on the MOSI line at time N-1. But, in the figure above, the data on the MISO line (green rectangle) is not the same as the data on the MOSI line (red rectangle). As you can see, there is a one-byte shift between the two data. This most likely explains the distorted sine wave in my first message (although I have not verified that yet).

    This is the second board for which we observe this problem. We have un-soldered the defective DAC9881 and soldered a brand new part. Then, the board has worked as expected. Un-soldering the new DAC and re-soldering the defective part has made the distorted sine wave to re-appear.

    Thus, we believe that, for some unknown reason, a DAC is damaged (its input shift register ?), but we cannot investigate much further since we do not know the inner details of the DAC. Maybe you could give us a hint about a possible mistake we make which creates this problem ?

    Thank you,

    Philippe

  • Can you try a couple items:

    1. Short SDOSEL directly to the supply.  Do you see a difference in the behavior? It is interesting that the device is clocking out the data shifted by 1 byte.

    2. What is the voltage of the digital logic? Is it >3.8V?

  • Hi Paul,

    Thank you for your reply.

    1. I connected SDOSEL directly to the supply by shorting R31 in the schematics above. It did not changed the results : the MISO signal is still byte-swapped.

    2. Digital logic voltage is 5V. In the figure below, example of a MOSI signal on the SDI pin of the DAC.

    Philippe

  • Hi Philippe, this is a very strange issue.  it seems like the device is shifting the lower 16bits to the left by 2 bits.  Do you see any significant ringing or noise on the clock line? After you power the device, can you toggle the RST line before you communicate? What does the supply ramp look like? Does AVDD ramp before VREF?

  • Hi Paul,

    Thank you very much for your interest in our problem.
    We think the DAC9881 is irreparably damaged and that this damage could lead to the above distorted sine wave.
    We think this because after the defective part was un-soldered, a brand new part was soldered on the same board with the same code and it worked properly.
    After re-soldering the defective part, the output sine wave was distorted.

    Thus, what matters to us is to determine what causes the damage, rather than to understand the effect of the damage on the ouput.

    When designing our DAC board, we overlooked the requirements for the power-supply sequence and the sequencing of the voltage was not considered.
    Thus, AVVD, IOVDD and Vref are not guaranteed to be set in this order. We wonder whether this could damage the DAC.

    I shall do some acquisitions to assess any ringing/noise on the clock line and the supply ramp.
    We set the RST pin, wait 20 µs, reset, wait 20 µs and set it after powering the board.

    Philippe

  • This device could have some issues if power sequence is not enforced.  Note that if we have some marginal startup/timing issue, we do expect some devices to pass and others to fail, so it does not necessarily mean it is damaged.

    I recommend you try the "bad" part with a controlled startup sequence and see if anything changes.  

  • Hi Paul,

    Ok, I understand that the part may not be damaged.

    We noticed that our board initially worked, but after powering it on/off and using it a couple of times, it stopped working as expected and yielded the distorted sine output.

    I am not sure it is important, but we use two isolators for the input signals. I attach our schematics to this message.

     

     We plan to mount the “bad” DAC9881 on an Evaluation Module. This way, if the Evaluation Module works as expected, we will know that the part has not been damaged.

    Philippe

  • Hi Philippe, 

    Please let us know of the results of the EVM test. Paul is reviewing the schematics now. 

    Best,

    Katlynne Jones