Hi Team,
Customer is debugging with AFE5809 and facing one issue which can influence LVDS logic data alignment function.
The issue happened in demod Ramp Pattern output mode test, per datasheet description as below, if we set the demod output mode to “Ramp pattern”, the MSB 8bits from output data should be ramp type, and LSB 8bits composed of five-digit Chip ID and three-digit Subchip information:
But during customer’s real test, this is not matched with datasheet:
- The actual Ramp Pattern output high eight bits Data[15:8] is not a changing ramp signal, but a fixed value 0xEA.
- Data[2:0] is not [0/1, 0, 0] as described in the manual, but the Channel number from 0-7.
- The behavior of Data[7:3] is in line with the description in the manual. After many tests, setting different Chip IDs will be correctly reflected in these five digits of data.
Customer’s test waveform is as below:
Customer wants to get AFE5809 normally outputs the ramp signal in the upper eight bits under the demodulator Ramp Pattern. Please help to check what’s the problem in here?
Some other info customer has checked:
1.ADC Ramp Pattern works correctly.
2.ADC and Demod Custom Pattern works correctly.
3.Demod output resolution and SERZ_FACTOR both are 16x, ADC output resolution is 14x, SERZ_FACTOR is 16x.
4.Readback all register settings are correct, as same as written.
Thanks.
