Dear Sir or Madam,
I am trying to figure out whether I need a far end or near end termination for the sampling CLK.
According to the Eval Board the termination seems to be at the transformer side. This suggests some low impedance input on pins 59,58.
For what wave impedance are the diff. traces on the eval board routed for?
Thank you for all your help.
Best Regards,
Hi Gruffalo,
Unfortunately, IBIS model is not available for the CLKP and CLKM pins.
CLKP and CLKM are not low impedance pins. Indeed, they are high impedance since these pins would connect to a clock buffer. These clock lines should be routed as 100 ohm differential on your PCB and terminated with differential 100 ohm close to the ADC.
The clock buffer is not a traditional LVPECL buffer so kindly ac-couple the clock inputs. As per datasheet, a differential swing of 200mVpp and above would be detected as clock.
Below circuit is from AFE5818. You can follow a similar circuit for supplying LVPECL clock to ADS5263. Place the 130-ohm, 80-ohm pairs close to the ADC. Effectively, they act as a differential 100 ohm.
Thanks,
Karthik
