Hi Team,
How to configure the through the spi.What are pin we need to connect?
pls support me and give the any reference code.....!
Thanks and regards
ARAVIND
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Hi Team,
How to configure the through the spi.What are pin we need to connect?
pls support me and give the any reference code.....!
Thanks and regards
ARAVIND
Hi Aravind,
Our primary engineer is out of office for the holidays, please allow some time for them to return.
However, please refer to the device datasheet for assistance with configuring the device for SPI communication.
This precision labs series may help: https://www.ti.com/video/series/precision-labs/ti-precision-labs-microcontroller-communication.html
Hello Aravind,
The ADS1278 does not have any internal configuration registers; all modes are set by connecting pins to IOVDD or DGND.
The ADC can use a standard SPI port to transfer the data. Data is launched on the DOUT pin on the SCLK falling edge, and the MCU can capture data on the SLCK rising edge for SCLK frequency less than 15MHz. All of the timing requirements are on page 8 of the datasheet (SBAS367F –JUNE 2007–REVISED FEBRUARY 2011):
There is no example code, but here is the general flow needed:
1. MCU monitors the /DRDY pin for a high to low transition. This can be done by software polling or using a hardware interrupt.
2. When the /DRDY pin goes low, the MCU needs to send 24 SCLKs per channel. If reading all 8 channels in TDM mode, you would need to send 24*8 SCLKs in total.
3. These SCLKs need to be sent before the next /DRDY high-to-low transition (or 1 data rate period) or the data will be corrupted. In general, it is best to set the SCLK equal to the CLK frequency (0.1MHz to 27MHz), which will meet this requirement.
Regards,
Keith Nicholas
Precision ADC Applications
HI Sir,
How to configer the different adc sampeling speed(ex-65ksps,25ksps,30ksps).
Thanks and Regards,
Aravind
Hello Aravind,
The data rate depends on the Mode Pin configuration (pins 33, 34) and the CLKDIV setting (pin 10), as well as the clock frequency. This relationship is shown in Table 8.
As an example, if you need 65ksps, then you will want to configure the ADS1278 in High-Speed mode (MODE1=0, MODE0=0) and CLKDIV=1.
The main input clock frequency will then need set to:
f-CLK/f-DATA=256
f-CLK=256*f-DATA=256*65k=16.64MHz.
Regards,
Keith