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ADC3563: GND connection method of ADC3563

Part Number: ADC3563

Dear Technical Support Team,

"Figure 9-10. Layout example: top layer of ADC356x/368x EVM".
In "Figure 9-10. Layout example: top layer of ADC356x/368x EVM", PIN14 and PIN37 are connected directly at the TOP layer, and other GNDs (IOGND, etc.) seem to be via VIA.

Can you tell me the reason for the above?

Is it NG to be connected at TOP?
Or is it possible to connect all of them via VIA to Layer2 GND?

Best Regards,


  • Hello,

    Based on the picture you have shown there was not room for vias near those two pins.  Pins 15 and 36 are power pins.  The thermal/gnd pad has multiple gnd vias in it make a good low inductance path to ground so the pins are connected to it.