LM98640QML-SP: Power trimming change error

Hi, 

Are you following below initialization scheme? 

Are you also following below recommendations? 

After device initialization, can you apply 'master power down' using SPI and confirm that device is indeed powering down by observing supply currents? This will check if SPI is indeed working. 

Also, do you really care if the output toggles during device initialization? This might be expected. Can you give a wait time (say 100us) after the device initialization and then check if the output toggles randomly? 

Thanks, 

Karthik N

Hi Karthik,

Thanks for your reply.

Below are the customer's responses.

1. They followed the initialization scheme above.

2. SCLK is currently using 20Mhz or less. (1~2MHz)

3. Main Clock is always supplied.

4. When the Master Power Down is performed after device initialization, the Device Supply Current is reduced to the Shutdown level.
After Master Power Down, it responds from Normal Active to Abnormal Active, and the power down and up for the PGA Buffer must be performed to return to normal.

Please tell us the cause and solution to the issue that the customer initially inquired about.

BR,

JH

Hi Karthik,

Are there any updates on the customer's questions.

Thanks,

JH

Hi Shin, 

It is not clear why customer cares about this issue. Can you answer the other pending question from my previous communication (below)?

Why does customer care if the output toggles during device initialization? This might be expected. Can you give a wait time (say 100us) after Step 2 (device initialization) and then check if the output toggles randomly after the wait time? 

Thanks, 

Karthik N

Hi Karthik,

Below is the customer's response.

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1. We are turning the device On/Off to set the Even/Odd Flag of LM98640.

2. I think there was a miscommunication. This is a symptom that appears after the reset, not during the reset process.
After the device is turned on and the PGA/ADC power trimming is changed, abnormal output is confirmed.
Since the data is being checked not only after 100us but also after seconds, I do not think that the initialization time is the cause of this symptom.

If I change the PGA/ADC power trimming, is there any additional control required for normal operation?

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Thanks,

JH

Hi Shin, 

Sorry for the delay. Can you share below information - 

1. What do you mean by output? Is it, TXFRM, TXOUTi, or TXCLK? Can you probe these signals using an oscilloscope along with INCLK? 

2. Do you see this on only one device or on multiple devices? 

3. Are you writing Step 4 in the initialization scheme? Can you NOT write this step in your scheme after power up, and check if the output is proper? 

Thanks, 

Karthik

Hello, karthik.

we have before some question which LM98640 abnormal operation.

first of all, these abnormal operating is after initialize time.

Hi Kim, 

Okay. I understand that you are seeing this issue on multiple devices.

Some questions - 

1. Can you elaborate on what you are observing in the below figure? 

2. What is your INCLK (Main clock) frequency?

3. So, you see abnormal behavior when you do Power trimming (section 7.3.8). If you do PGA : power-down ->power-up, then the behavior comes back to normal. Is this correct? 

4. In the below initialization scheme, can you share all the registers you are writing in Step 3 and Step 4?

5. Can you follow instructions on this E2E thread. You will have to write to all the baseline registers except the reserved registers after power up. I hope you are doing that right now. 

Thanks, 

Karthik N

Hello, Karthik

here are answer your question.

1. Can you elaborate on what you are observing in the below figure? 

Ans.

-. LM98640 has even/odd flag. so, we are device on & off operate for order to get want even/odd signal.

-. we are expect normal operation like on figure.

-. but some device operated abnormal action

2. What is your INCLK (Main clock) frequency?

Ans.

-. 23.5Mhz Main Clock used.

3. So, you see abnormal behavior when you do Power trimming (section 7.3.8). If you do PGA : power-down ->power-up, then the behavior comes back to normal. Is this correct?  

Ans.

-. i don't understand section 7.3.8, but after PGA Power down & up on  Power down control register, abnormal action to normal action.

4. In the below initialization scheme, can you share all the registers you are writing in Step 3 and Step 4?

Ans.

-. Yes, we correct operate. we set register about used main clock 23.5Mhz.

5.5. Can you follow instructions on this E2E thread. You will have to write to all the baseline registers except the reserved registers after power up. I hope you are doing that right now. 

Ans.

-. Yes. we are set baseline register and then we change PGA power trimming for optimization. (PGA Power trimming 001 001). in according to datasheet, LM98640 has possible change power trimming for optimization.

-. after change PGA power trimming. Master Power down Off -> On behavior, LM98640 is abnormal operate.

-. and then, we are PGA power down & up sequence bebavior, LM98640 is normal operate.

-. Why?