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ADC3563: LVDS interface with Lattice FPGA

Part Number: ADC3563

We've using ADC3563 with two types of FPGA (one is MAX10 and the other is Lattice Certus-NX device).
Interesting thing is interface with MAX10 works well, but some how interface with Lattice device is not working well.

I want to know if we need a special handling with Lattice FPGA especially LVDS signal levels... As we know is Lattice LVDS output peek-to-peek is slightly smaller than MAX10 device (around 50mV range).

Please let me know if you have any recommendations or have a reference design interfacing with Lattice FPGA.