• State Resolved
  • Locked Locked
  • Replies 4 replies
  • Answers 1 answer
  • Subscribers 48 subscribers
  • Views 326 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADC3642: ADC3642

Paulino Marcelo
Prodigy 30 points
Part Number: ADC3642
Hello,
 
I am using ADC3642 device in binary output format ( 0x8F and 0x92 = 02)  and can see the format is correct.  I am applying a 1V differential at the input.  The problem I am having is that adc digital outputs swing to maximum (0x3FFF) at around 200mV.   We are using half scale (0 --> 1.125V) in this application.  I've checked all the supplies and all are good.  VCM output is connected to VCM input of the diff amp driving the ADC and is set to .95V.  Any feedback will be appreciated.  My sch page for reference.
 
Thanks in advance,
Paulino
  • 0
    TI__Expert 5560 points

    Hi Paulino,

    How are you measuring the digital outputs?  With a high-impedance probe?   Also, the picture you sent is low resolution so I cannot see it.

    Regards,

    Geoff

  • 0 in reply to Geoff Roth
    Prodigy 30 points

    Hello Geoff,

    Thanks for getting back to me. I am using a logic analizer to look at the digital outputs for ch 2 (DB[7:0] and DCLK).  I  originally had default configuration through pins with 2's complement with external reference (REFBUF = 1.2V).  N

    ow, I am wondering if once I programmed binary format through SPI it requires all device configuration to be done through SPI. If so, can you share configuration values for all registers involved to configure binary format for both channels using external REFBUF = 1.2V?  

    I used the sample sch on figure 9-1 in DS for reference. 

    Br,

    Paulino

  • 0 in reply to Paulino Marcelo
    TI__Intellectual 2280 points

    Hi Paulino,

    The entire SPI configuration should not need to be redone.

    For the output data format, you just need to set bit 1 (data should be 0x02) for registers 0x8F and 0x92.

    Regards,

    Drew

  • +1 in reply to Drew Harrell
    Prodigy 30 points

    Hello Drew,

    Thanks for confirming device configuration is not needed after a SPI access, great.  Now, for enabling offset binary it is also recommended to enable digital bypass through bit D2 in address 0x24.  I will go ahead and enable this feature as well.  Thanks for the feedback.

    Paulino