AFE7222: AFE7222

Hi Yousef,

Apologies for the delay. Please see the Clocking section on page 95 of the datasheet for single ended CLKIN options.

For the other differential pairs, we will look into options for that and report back early next week.

Best regards,

Drew

HI Drew,

Thank you for the answer. For the ADCs, I could sample up to 10V via a resistor network. For the DACs, is there any configuration in which I could get 10Vpp out? According to the datasheet, the DAC outputs are limited to AVDD3_DAC+0.5V. Would it be better to use a small transformer, or to use an amplifier? 

Thank you,

Yousef

Hi Yousef,

I am a little unsure of what you are trying to do. Would you be able to send over a block diagram of what you are trying to do?

Best regards,

Drew

The application would be to use the AFE7222 to read 0-10V on the ADC and put out 0-10V on the DAC. Since the 7222 itself isn't able to read/output those levels, I need to find a way to do so. For the ADC portion, a voltage divider should work. Would an I/V converter OPAMP circuit work for converting the DAC output to the 0-10V I would need. I'll draw up an example schematic.

Would something like this work? 

Hi Yousef,

Thank you for sending this over. I will look into this and get back to you tomorrow.

Best regards,

Drew

Hi Yousef,

Apologies for the delay, I looked at this the other day and thought I hit send.

Please place 100 Ohm pullups on each of IOUTP_A and IOUTP_B.

Do you need to DC couple? Otherwise, I would put series 0.1uF caps before R1 and R2. You also don't need R7 and R8.

Lastly, have you simulated this to make sure you're getting the proper output?

Best regards,

Drew

Hi Drew,

Sorry for the delay. Yes, I'd like to have DC coupling in the case of low frequency/voltage output for references. I drew up the following circuitry for the ADC side of the AFE7222 for 0-10V input. Can you please take a look as I'm trying to minimize the number of components. Are the resistors and capacitor between the differential ADC inputs necessary? I'm also assuming that the 0-10V input has to have a 1V swing centered at VCM. Thank you. 

Hi Yousef,

It might be best for you to try to simulate both the analog input and output circuits for the ADCs and DACs using TI TINA sim.

You can download this for free here.

https://www.ti.com/tool/TINA-TI

Just looking at the analog input circuit, I don't understand why you knocking down the VCM on the INP input with a resistor divider.

As far as the RCR filter between the INP and INN inputs, I would keep this in order to make sure the charge kickback on those inputs is minimized.

Regards,

Rob

The divider on VCM (which should have had the 45 ohm resistor to ground and 50 ohm resistor to VCM) scales VCM down to 0.45V. The divider on the input scales 0-10V to 0-1V. 0-1V biased with the 0.45V will make it 0.45-1.45V, which would be a 1V swing centered at 0.95V. I simulated the circuit and it seems to be the case. Would it be fine to just feed 0-1V into INP and VCM into INN?

Hi Drew,

Sorry for the delay in communication. So I just used LTSpice for the simulations and I already got back a test PCB. With the above circuit, I am able to scale 0-10V to 0.45-1.45V. I currently have the board wired up in a way such that the AFE7222 operates in half duplex mode. I want to operate it in full duplex mode, such that for testing, I can supply a voltage to the ADC, and the AFE7222 digitizes the input voltage. Since the DAC and ADC portions share the same data bus (wired in 12 bit parallel mode), if I operate in full duplex, the DAC buffers should load in the ADC data, and convert it to an output voltage. I'd like to test it without having to set up an FPGA. Is there a register map I could use to do that? I don't have the dev board, so I wouldn't be able to use the software for the chip. Any guidance here would be appreciated.

Thank you,

Yousef

Hi Yousef,

Apologies for the delay. Would you be able to share a block diagram of your system or the full schematic? More information on your clocking scheme would also be helpful here.

Best regards,

Drew

Sure. Can I send the design over email? In terms of clocking, I only have 2 signals going to the AFE7222. Sample clock & data clock. When in ADC mode, is the ADC data clock an output? If that's the case, can I use the ADC data clock output as the input to the DAC clock input without having an external clock (other than the sample clock)?

Yousef,

Yes, my email is drewharrell@ti.com

The ADC_DCLKOUT is always an output. In certain cases, yes the ADC_DCLKOUT can be used as DAC_DCLKIN. In default mode it looks like you should be able to provide a differential clock and feed ADC_DCLKOUT to DAC_DCLKIN. This should be done at 65 MSPS as that is the max sample rate of the ADC.

Regards,

Drew

Just sent over the schematics. Does the AFE7222 do anything by default? If not, could I get a register dump for full duplex operation. I tried using the software, but I think it expects the dev kit's FT245 driver and all I have is an FT2232. Is there a way to configure that?

Thank you,

Yousef

Yousef,

When you say software, are you referring to the GUI download on the product page for the EVM?

Best regards,

Drew

Yes.

Yousef,

Correct, since the GUI is designed for the EVM with that FT chip. You can use the other FT chip, it will just need to be configured and routed appropriately for your system.

In the meantime, you mentioned nothing happening with a low frequency sample clock. Would you be able to scope the ADC_DCLKOUT pin to see if there is a signal there?

Best regards,

Drew

Hi Drew,

Is there any way to configure the FT chip? I didn't see COM port selections, and the software just said nothing was detected. I don't currently have access to the board, but when I was trying it out, nothing was happening on any of the data lines or the DCLK line. I'll see if I can set the board up again tomorrow. 

Thank you,

Yousef

So I just placed an order for an FT245R breakout board and should be able to test it that way. I know I already asked this, but with all registers reset, what is the operation of the AFE7222?

Thank you,

Yousef

Yousef,

With all registers reset, the part should be in bypass mode with both TX and RX enabled. If you get the board set back up please check the ADC output data clock.

Can you also please clarify what you mean by "nothing was happening" on the data and clock lines?

Best regards,

Drew

I will have to set the board back up later when I get home. My windows vm isn't communicating with my clock generator. I will let you know exactly what I see then. In the meantime, does the schematic seem to have any issues?

Thank you,

Yousef