• State
  • Locked Locked
  • Replies 1 reply
  • Subscribers 46 subscribers
  • Views 137 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADC12DJ5200RF: ADC12DJ5200RF TMSTP connection to FPGA

Tamami
Prodigy 21 points
Part Number: ADC12DJ5200RF

hello,

I have a LVDS output from a Xilinx Ultrascale+FPGA and would like to connect it to the TMSTP inputs.

Unfortunately  the DC-coupled TMSTP must meet the low common mode voltage requirements, which is not compatible with LVDS.

Can you tell me about recommended method of interfacing a LVDS signal for the TMSTP inputs.

  • 0
    TI__Expert 4660 points

    Hello Tamami, 

    There is no way to meet the common mode requirements of the ADCs TMSTP pins and the common mode requirements of the LVDS signal well DC coupling them together, the best solution would be to use a resistive divider between the two to meet the common mode requirements. 

    If you can AC couple the LVDS signal then this can work as you can bias either side of the AC coupling capacitor.

    Best,

    Eric Kleckner