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ADS1235: Grounding Thermal Pad with bipolar power

Part Number: ADS1235

I am using the ADS1235 in a bipolar powered system (AVDD = 2.5VDC, AVSS = -2.5VDC) and the thermal pad is connected electrically and thermally (through multiple vias) to the ground plane. One of my fellow engineers just noticed the ADS1235 data sheet spec'd that the thermal pad to be connected to AVSS.  My understanding is the thermal pad is used for heat only (it is not connected to AVSS electrically inside the ADS1235).

AVSS on our PCB is just a trace (not a separate PCB layer or plane).

Question: should we change our PCB layout to connect the ADS1235 thermal pad to AVSS or is it ok to leave it connected to the ground plane? We have been using the Thermal Pad to Ground connection for about a year now and haven't noticed any problems with this.

  • Hi Philip Ouellette,

    There is a possibility that there can be higher leakage current at higher temperature when the thermal pad is connected to DGND instead of AVSS in a bipolar configuration.

    The recommended option would be to connect the thermal pad to AVSS

    -Bryan

  • Thanks for the insight.

    Question, what is the primary purpose of the thermal pad?

    1. To dissipate heat generated in the IC?
    2. To stabilize IC temperature?
    3. To reduce temperature gradients across the IC?

    The 3rd PCB layer is dedicated to power (planes and fat traces). We are thinking about moating off the power plane directly beneath the thermal pad to provide additional heat dissipation for the thermal pad by added vias. Is this a good idea, or is it sufficient to just have a top layer copper pad under the thermal pad of the IC without thermally bonding it to a larger copper place in an interior layer of the PCB?

  • Hi Philip Ouellette,

    Since these are relatively low power devices, the thermal pad, despite its name, is really there for mechanical stability.

    We tested multiple connection options for the thermal pad (float, AVDD, AVSS, DGND), and found that AVSS and DGND resulted in virtually no leakage current between AVDD and AVSS, while connecting to AVSS or floating showed much higher leakage current. However, it was clear from the data that the leakage current behavior was nonlinear, so it is possible that higher temperatures could increase the leakage current when the thermal pad is connected to DGND (since this is at a higher potential relative to AVSS in your system). Since we did not perform these tests across temperature, I cannot tell you for sure that this will occur, just that it is a possibility. Hence the recommendation to connect the thermal pad to AVSS

    -Bryan

  • Not asking about connecting the thermal pad to AVSS (we are going to do that). My question is does the thermal pad play a role in the thermal management of the IC? Does the physical implementation of the PCB pad matter? 

    My question is should we bond the thermal pad PCB landing to a larger copper layer with multiple vias? If the purpose of the thermal pad is entirely physical (just to physically attach the IC to the PCB), then we should be able to just have an AVSS pour for the thermal pad on the top layer of the PCB.

    I am asking because understanding the point of the thermal pad reduces the likelihood of me doing something stupid with it.

  • Hi Philip Ouellette,

    My question is does the thermal pad play a role in the thermal management of the IC? Does the physical implementation of the PCB pad matter? 

    In the case of this device, no, not really. But this is not a true statement for all QFN devices of course. As mentioned, this device is not really high power so there is not significant thermal dissipation through the pad

    However, note that the thermal characteristics provided in the datasheet use a 4-layer PCB with the vias as shown in the mechanical drawings. See section 3.4 in this document for more info: https://www.ti.com/lit/an/slua271c/slua271c.pdf?ts=1714507238517. So it is possible that the thermal characteristics will be different if you employ a different PCB structure and/or via configuration (we haven't characterized the thermal performance any other way, so we cannot tell you how much or if these specs would change). That being said, if your system will be at approximately 25C then this likely wouldn't be an issue anyway

    If you have a thermal pad pour on the top layer that then connects to the AVSS pin, and then drop a via to the AVSS plane / polygon, this will likely be fine. If this is not what you wanted to do please draw a picture so we can review

    -Bryan