DAC63204EVM: DAC63204EVM

Hi Mitali,

The DAC63204EVM has it's own on board FTDI controller (FT4222) that interfaces with the GUI. The STM micro will not be able to interface with the GUI. You'll need to write your own code to control the STM micro.

Best,

Katlynne Jones

Hi Katlynee,

Let me reframe the question.

I have 2 different setups.

Setup1 - DAC configuration with GUI (from PC over USB). No STM32 Micro used.

Value 0x1249 at address 0x1F,

Value 0x8000 to address 0x03,

Value 0x0FF0 to address 0x19

I could see the dac output with respect to the value provided in register 0x19. I am satisfied with the results

Setup2 - DAC configuration with STM32 over SPI . GUI / PC are not used.

Connections are as following -

SCK (STM32 nucleo board) to SCLK(DAC63204EVM)

MOSI (STM32 nucleo board) to SDI(DAC63204EVM)

CS(NSS) (STM32 nucleo board) to SYNC(DAC63204EVM)

Register setting are as-

Please can you confirm if these are the only registers to be configured?

Observation -

The DAC Output does not change corresponding to input data value.

Also, there is no signal at SDO. It is continuously High.

Please also confirm the clock configurations for SPI and is writing to NVM compulsory? If yes, how to store the data to NVM. Can you share the register address and data.

The clock configurations that I am using are as follows-

CPOL = 1

CPHA = 0

Thanks,

Mitali.

Hi Mitali,

I apologize for the misunderstanding. Thanks for the additional information. 

Make sure to remove the jumpers on J5 and J6 completely so your SPI signals are not conflicting with the signals from the EVM's on board controller. 

Those are the only required registers to enable SDO and set an output to channel 0. Your SPI mode is also correct.

It is not required to write to NVM. You would only write to the NVM when you are satisfied with the DAC settings and you want the DAC to power on with those same settings on the next power cycle. 

Please make sure those jumpers are removed and let me know if you are still having an issue. So far everything looks ok with your code sequence and the timing diagram (looks to be the write to the common-config register). 

Best,

Katlynne Jones

Hi Katlynne,

I confirmed that jumpers J5 and J6 are removed while communicating via SPI mode . Yet I cannot see anything on SDO. Can you confirm the only required registers are as follows:

I am also attaching the waveforms captured for the data sent through Nucleo board and DAC GUI. If you see I have captured the waveforms for register 0x1F (Common Config Register).  For the same value send, I got different response. 

1. Waveform for Comman Configuration Register (Address: 0x1F) by sending data to GUI

Below waveform is captured by writing data to register 0x1F (Data is : 0x1249) over GUI

2. Waveform for Comman Configuration Register (Address: 0x1F) by sending data from Nucleo board

Below waveform is captured by sending data (0x1F, 0x12, 0x49) over Nucleo Board

I suspect SPI clock configuration may be the cause? Please can you confirm this?

Thank you,

Mitali.

Hi Mitali,

Your SPI mode is correct. The data is being shifted out on the rising edge, and the DAC will capture it on the falling edge. 

You will not see anything on SDO until SDO is enabled, and I don't think the DAC is receiving the command to enable SDO. 

Do you have a ground on the Nucleo Board connected to the DAC6320EVM? I notice the data is very noisy in your plot from the GUI, while the Nucleo Board board is not. Could be a grounding issue and the DAC not  being able to interpret the data correctly. 

Best,

Katlynne Jones

Hi Katlynne,

I am successfully able to run DAC in Voltage Output mode as I can see the voltage on OUT0 pin varying as per my data on input line. I am still not able to see data on SDO line, I am getting continuous HIGH on SDO. To enable SDO, I believe only INTERFACE CONFIG REGISTER has to be  updated. I tried configuring interface config register with 0x0001h, as it didn't work I again configured the interface config register with 0x0005h.

Could you please confirm me that , if the INTERFACE CONFIG register is the only register to be configured to enable SDO?

Thanks,

Mitali.

Hi Mitali,

Yes, the interface config register is the only required register to enable SDO. 

The GPI enable bit should be set to 0 (which is the default)

Can you confirm that you see SDO functional on the EVM when you are using the GUI?

Best,

Katlynne Jones

Hi Katlynne,

Thank you for your response! The SDO is functioning as per the suggestions mentioned by you in the response.

Just want to confirm that, does the DAC53202 have the same configuration as DAC63204, or is there any change in its configuration registers?

Thank you Katlynne.