DAC80502: VREFIO pin current

Hirotsugu Kobayashi

Part Number: DAC80502

Hi team,

We are using the DAC80502 in external reference mode.

When the power is turned off, the voltage drops in the order of VDD and VREFIO.

At this time, current flows from the VREFIO pin to the VDD pin via the ESD protection diode, but it is suppressed to 10mA or less using a limiting resistor.

However, when the VDD pin voltage drops to around 2V, a peak current of about 100mA flows. Even if the capacitance of the VREFIO pin is reduced to 0.22uF, a peak current of about 40mA flows.

Does this peak current affect the reliability of the IC?

Does it violate the input current rating of 10mA in the datasheet?

Best regards,

over 1 year ago

0 Katlynne Jones over 1 year ago

TI__Mastermind 41313 points

Hello,

The inputs to the DAC should never exceed VDD. Even if you were to maintain a lower current, we don't recommend exceeding any of the maximum ratings. Repeatedly power the device down in the order of VDD and VREFIO will stress the device. Over time this could lead to performance degradation or damage.

Best,

Katlynne Jones

0 Hirotsugu Kobayashi over 1 year ago in reply to Katlynne Jones

Mastermind 9530 points

Hi Katlynne,

This peak current occurs when VDD is around 2V.
I think that it is flowing into the IC from the capacitor, so I cannot limit it.
Does this current correspond to the rated 10mA?

Best regards,

0 Katlynne Jones over 1 year ago in reply to Hirotsugu Kobayashi

TI__Mastermind 41313 points

Hello,

Yes, the reference needs to meet the 10mA current limit, and the voltage limit in the absolute maximum ratings to ensure device reliability over time.

Is it not possible to adjust the power down sequence so the reference powers down before the DAC?

Best,

Katlynne Jones

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DAC80502: VREFIO pin current