I have two questions about ADC12DJ5200RF Datasheet
Datasheet URL: https://www.ti.com/lit/ds/symlink/adc12dj5200rf.pdf?ts=1716424043191&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FADC12DJ5200RF
Q1. The ADC side transmits data from the JESD204 PHY using 2LINKs of 4Lane+4Lane,
but at this time, do each LINK transmit data in synchronization?
Q2. One LINK can output 8 lanes, but when JMODE = 0, only 4 lanes out of 8 lanes are used,
2LINK output of 4Lane/8Lane + 4Lane/8Lane.
At this time, is it okay to open the unused 4Lane+4Lane?
