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ADC34J45: SPECIAL MODE2 CHA [1:0]Register 122h

Goran Marinkovic
Intellectual 330 points
Part Number: ADC34J45

Tool/software:

The datasheet states to write a "1" to this register. Does this mean binary "00000001" or is this per bit write a 1... will say "00000011"? What does this register do?

  • 0
    Intellectual 330 points

    I assume the correct setting is "00000011" since there is a remark here:

    And the effect it has is as shown here:

    The table "HD2 Second harmonic distortion" is showing the effect for "Dither mode"

  • 0 in reply to Goran Marinkovic
    TI__Mastermind 22810 points

    Hi Goran,

    Yes, it is write a 1 per each bit so 0x122 should be written with 0x03 for better HD2 or 0x00 for default power on setting.

    Thanks, Chase

  • +1 in reply to Chase W
    Intellectual 330 points

    Hello Chase,

    I changed my configuration file to:

    0x122 0x03 // Register 0x122; bit(7:2) := not used = '000000'; bit(1:0) := SPECIAL MODE2 CHA [1:0] = '11' = Always write 1 for better HD2 performance.
    0x134 0x28 // Register 0x134; bit(7:6) := not used = '00'; bit(5) := DIS DITH CHA = '1' = Dither is disabled and high SNR mode is selected for channel A; bit(4) := not used = '0'; bit(3) := DIS DITH CHA = '1' = Dither is disabled and high SNR mode is selected for channel A; bit(2:0) := not used = '000'
    0x222 0x03 // Register 0x222; bit(7:2) := not used = '000000'; bit(1:0) := SPECIAL MODE2 CHD [1:0] = '11' = Always write 1 for better HD2 performance.
    0x234 0x28 // Register 0x234; bit(7:6) := not used = '00'; bit(5) := DIS DITH CHD = '1' = Dither is disabled and high SNR mode is selected for channel D; bit(4) := not used = '0'; bit(3) := DIS DITH CHD = '1' = Dither is disabled and high SNR mode is selected for channel D; bit(2:0) := not used = '000'
    0x422 0x03 // Register 0x422; bit(7:2) := not used = '000000'; bit(1:0) := SPECIAL MODE2 CHB [1:0] = '11' = Always write 1 for better HD2 performance.
    0x434 0x28 // Register 0x434; bit(7:6) := not used = '00'; bit(5) := DIS DITH CHB = '1' = Dither is disabled and high SNR mode is selected for channel B; bit(4) := not used = '0'; bit(3) := DIS DITH CHB = '1' = Dither is disabled and high SNR mode is selected for channel B; bit(2:0) := not used = '000'
    0x522 0x03 // Register 0x522; bit(7:2) := not used = '000000'; bit(1:0) := SPECIAL MODE2 CHC [1:0] = '11' = Always write 1 for better HD2 performance.
    0x534 0x28 // Register 0x534; bit(7:6) := not used = '00'; bit(5) := DIS DITH CHC = '1' = Dither is disabled and high SNR mode is selected for channel C; bit(4) := not used = '0'; bit(3) := DIS DITH CHC = '1' = Dither is disabled and high SNR mode is selected for channel C; bit(2:0) := not used = '000'

    Please add this as well to the configuration file of TI called ADC3xJxx_160MPSP_Operation_LMK_Setting.cfg

    In addition file a change request to your software group to write not only to the related registers 0x01 but always to the registers addresses 0x134, 0x234, 0x434 and 0x534 as well. Currently the software is only writing to register address 0x01 which leaves the ADC in a not documented state.

    Cheers
    Goran