• State Resolved
  • +1 person also asked this people also asked this
  • Locked Locked
  • Replies 3 replies
  • Subscribers 47 subscribers
  • Views 259 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADS1248: ADS1248 Register write and read value is differed. And also, return garbage ADC value.

Narasimman M
Prodigy 10 points
Part Number: ADS1248
Other Parts Discussed in Thread: ADS124S08

Tool/software:

 Hi,

   We are using ADS1248, 24-bit ADC chip to interface with STM32 controller via SPI Communication. We have not got proper output ADC value. When always read the ADC value get Junk value repeatedly even, I have adjusted Potentiometer.

In this case we want to check handshake between STM and ADS1248 is DONE or NOT. So, wrote simple code for checking communication between ADS1248 and STM. So, we choose one register to write some value and again read that particular register to compare both values are same or not. But we got different values, both are not same.

Here attached the document of schematic and example source code.

Kindly verify it and help us to resolve this issue.

Schematic

SPI Configurations

My Source code

4274.ADS1248.zip

  • +1
    TI__Mastermind 42821 points

    Hi Narasimman M,

    Can you make sure the controller is capturing data on the falling edge of SCLK? I am not sure if that is what "CPHA = 1 edge" means, but maybe that means first edge e.g. rising? Different controllers have different nomenclature, so just make sure you are capturing on the falling edge

    If that doesn't work, can you send logic analyzer plots showing the data communication for the WREG and RREG? Please include CS, SCLK, DOUT, DIN, DRDY, START, and RESET. Thanks.

    -Bryan

  • +1 in reply to Bryan Lizon86
    Prodigy 10 points

    Hi Bryan,

      Yes, You're correct. Thank you so much for contribution. We wrongly select CPHA = 1 edge, it means the controller capturing data on the raising edge. We apologize for our misunderstanding in STM32 Controller settings. Actually CPHA = 2 is correct, it means the controller capturing data on the falling edge. After this setting, we confirm handshake between STM and ADS1248 is DONE.

                 I Have one more doubt, if I'm using differential mode, in an example the 8 channels will paired as following (0,1), (2,3), (4,5), (6,7). Here Is there any delay need between these pairs for sampling?

  • +1 in reply to Narasimman M
    TI__Mastermind 42821 points

    Hi Narasimman M,

    The ADS1248 has a fully flexible mux, so you do not necessarily need to choose adjacent pairs for differential measurements. I have copied the register map below to demonstrate this. For example, you could choose MUXP = AIN3 and MUXN = AIN7, or vice versa, or any other possible combination

    When you are switching the mux channels, you might need to add in delays to allow for analog settling of your input signal. How much delay is something you would have to figure out based on how your system is designed.

    We released the ADS124S08 a few years back, which is the next generation of the ADS1248. The ADS124S08 has a built in programmable delay feature that automatically waits the selected delay time before starting a conversion. I would consider the ADS124S08 for this project if possible, but certainly for new projects

    -Bryan