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ADC3422: high frequency spurs on ADC input

Andrea Pastega
Prodigy 110 points
Part Number: ADC3422

Tool/software:

Hello,

we are developing an RF receiver including an I/Q demodulator and a TI ADC3422 converter.

Analog I/Q outputs from the demodulator are fed to ADC inputs though a very simple passive network for AC coupling and to provide correct common voltage at ADC inputs.

The device works, however some spurs at high frequency multiples of sampling rate are received.

The problems seems to be related to the presence of high frequency multiples of sampling rate at ADC inputs; unwanted signal is present at I/Q outputs of demodulator and due to internal chip leakage is also received with some attenuation.

Just to place some numbers:

Fs = 49.104 MHz

Spur frequency = Fs * 24 = 1178.496 MHz

The idea is to place a low pass filter at ADC input. Is this the correct way to reduce these spurs?

Thanks

Andrea

  • 0
    TI__Mastermind 21105 points

    Hi Andrea,

    What are the levels of these spurs in dBFS or dBc? The ADC should not have any spurs at this frequency so it is coming from the clock source or more likely, the input signal. If you decide to filter the clock signal, use a bandpass filter. The input can be filtered with a lowpass filter to help reduce these spurs which are being picked up from somewhere else in your rx chain. Do you have the ability to supply direct RF signal from a high performance, low noise signal generator?

    Thanks, Chase 

  • 0
    Prodigy 110 points

    Hi Chase,

    maybe I didn't express the problem at best.

    Signal chain is composed by a demodulator (IQ output), followed by ADC (ABCD inputs).

    As ADC operates switching a capacitor at input at sampling rate, and demodulator output impedance is not low (around 1kohm), on ADC inputs an unwanted signals component at Fs (and multiples) is present. This is not a problem for the ADC, because it is its normal operation. However, high frequency components (in this case 24 * Fs) pass in reverse direction through passive network for AC coupling and DC bias setting, thus are present at IQ outputs of demodulator. As at high frequencies internal isolation of the demodulator between IQ output and RF input stages is scarce, the component leaks to receiver input (which is tuned at a similar frequency) and is then received.

    So basically high frequency components on demodulator to ADC signal path shall be filtered, to avoid this loop. 

    Thanks

    Andrea