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ADS131M02: Problem Data acquisition code value conversion problem

Part Number: ADS131M02
Other Parts Discussed in Thread: ADS131M04EVM

Tool/software:

Below is the abnormal when I use the ADS131M02.

 

Hardware connect :  Connect the CH0N to AGND, connect the CH0P to 0.55V.

Based on the above connection , I got the ADC counter value : 0x7619E9, and the calculation is (7739881/8388608) * 1.2 = 1.10V, which is not match the input 0.55V.

 

what I did:

  1. Read all the ADS131M02 Reg, all the value  is default value , and the register value of 0x00 is 0x2205.
  2. Set the register of "CH0_CFG"  and do the internal signal test.

what I did like this : Set the 0x09, 0x0e  Register's  unit MUX1[1:0] to 2'10b, then I get the ADC counter 0x20CEFC,  2150140/8388608 = 0.2563, in my understanding, under internal signal test mode, the ratio should be 2/15 which mentioned in the datasheet.

When I set the Set the 0x09, 0x0e  Register's  unit MUX1[1:0] to 2'01b, then I get the ADC counter 0x0006AF.

 

Hope to get your support.

 

Thanks & Regards

  • Hi user4637774,

    You conversion code is almost double to the normal code you should get from the ADC, can you please provide the following information?

    • The Gain setting you configured in Gain1 register, you can read it back to check.
    • SPI configuration (CPOL and CPHA) or your timing if you could provide.

    BR,

    Dale

  • Thanks for the feedback.

    For the Gain Seeting, I checked all the register of ADS131M02(Hardwae reset, then read from the register), all the register value is the default value, so I think the Gain is 1.

    For the SPI Configuration, I used COPL = SPI_POLARITY_LOW, and CPHA  =  SPI_PHASE_2EDGE .   "In SPI mode 1, the SCLK idles low and data are launched or changed only on SCLK rising edges; data are latched or read by the master and slave on SCLK falling edges. "

  • Hi user4637774,

    When the gain of your ADC is 1 and also CPOL=0 and CPH=1 as you mentioned, your ADC should worked properly, I double checked on the ADS131M04EVM. Are you using your own microcontroller? could you uploaded your timing plot for /CS, SCLK, DIN and DOUT? Your schematic will be helpful.

    BR,

    Dale