Original question:
Tool/software:
We are able to read only ADC channel data and its status. But we are not able to read and write its configuration registers. Also when we send 0x0 command, does it consist of status of 2 bytes then adc channel 0 data of 4 bytes and so on for channel 1,2,3. That means is it total 18 bytes to be received? I assume we are running with default settings as we are not able to configure any registers.
Thanks Bryan for immediate reply.
I am sharing you below logic analyzer capture in which i am sending the write register command to change the gain. below is the code snipshot.
Image taken at logic analyzer setting when CPOL = 0 and CPHA = 1.
Image taken at logic analyzer setting when CPOL = 0 and CPHA = 0.
For both the above setting of Analyzer, controller setting was same as CPOL = 0 and CPHA = 1 as specified in ADS131 datasheet. Please refer below image for SPI settings
also given Default commands(RESET, WAKEUP and Unlock) to see the Response as mentioned in Manual.
Hi Bipin Patil,
To be clear, the ADS131M04 expects CPOL = 0 and CPHA = 1, so don't use any other SPI configuration
It is not obvious to me that the controller you are using captures data the correct way, even though it says "mode 1". You should be capturing data on the falling, not rising edge.
You also need to follow the command structure as defined in the datasheet (see section 8.5.1.7). I don't see any of the responses in any of your logic analyzer captures.
-Bryan
That's correct we are using CPOL = 0 and CPHA = 1 configurations only. Also we are using standard SPI configuration so it the internal module which is capturing and generating the data. So I hope F280039C should generate the signal as per SPT settings CPOL = 0 and CPHA = 1 but i could not see the same. Also In the waveform above you could see the response which is wrong and not as expected.
So what is the solution for this.
Hi Bipin Patil,
The CS pin frames each command, and then the response is in the next frame - this was shown in the image I included in my last post, from the M04 datasheet
In the image you just included, there is only 1x frame (CS only goes low then high once). So the "response" in the frame you are showing would be relative to the command in the previous frame, which I cannot see. And the response from the commands you are showing in this frame are in the next frame, which I also cannot see. Please make sure to follow the datasheet
Also, my point about the SPI mode is to make sure you are capturing data correctly, regardless of what the mode # is in the MCU config screen. The sysconfig image you provided says "SPI mode 1, rising edge". I am not sure that is what you want. In the image below that you previously included, the data capture is incorrect. You don't want to capture data on the edges - see how the falling edge of SCLK is always on the edges of the MOSI transitions? That is not what you want, and it makes sense that the logic analyzer interpreted 0xC400 on MOSI, which is not even a valid command for the M04!
When you switched the analyzer to CPOL=0, CPHA=0, then the capture was correct for a WREG command (0x6200 ...), which leads me to believe the setting on your MCU is incorrect
I think below image shows the response of next frame also. OK just let me know reading data for all three channels how much query of 16 bit i need to send to receive complete data. And how much bits are to be read for status is it 16 or 32 bit then i think followed by 4 of 32 bits for 4 adc channel even if the word length setting is 24 bit which is default. Can you just share adc data frame format when word length is 24 bit.
"Also, my point about the SPI mode is to make sure you are capturing data correctly, regardless of what the mode # is in the MCU config screen. The sysconfig image you provided says "SPI mode 1, rising edge". I am not sure that is what you want. In the image below that you previously included, the data capture is incorrect. You don't want to capture data on the edges - see how the falling edge of SCLK is always on the edges of the MOSI transitions? That is not what you want, and it makes sense that the logic analyzer interpreted 0xC400 on MOSI, which is not even a valid command for the M04!"
To answer the above point, so when i set both the configuration (of logic analyzer and MCU Texas F280039C) as CPOL=0, CPHA=1 and tries to send command as 0x6200 logic analyzer treats that as 0xC400 as it is capturing the data at falling edge which is correct for logic analyzer as per settings and standard (refer image below) but i think MCU at setting CPOL=0, CPHA=1 MOSI is not able to send data as per standard as it is doing level transition at falling edge of the clock rather than the rising edge. That's why for the same data command of 0x6200 from MCU logic analyzer is treating that as 0xC400.
Is something i am missing in MCU setting.
