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AFE4490SPO2EVM: Adding reverse voltage at Photodiode.

Part Number: AFE4490SPO2EVM
Other Parts Discussed in Thread: AFE4490

Tool/software:

Hi, I am currently working on a design involving the AFE4490 and have encountered a few questions.

We are planning to deviate from using the existing NellCor DS-100A PulseOx Connectors and instead use new Red and IR LEDs in conjunction with a photodiode.

Since our photodiode does not operate under zero bias, we need to create a reverse bias condition.

This necessitates applying a reverse bias voltage across the photodiode, with the anode and cathode needing to be connected to different potentials compared to the INN and INP of the TIA.

To address this, I am considering incorporating Bias Tee models with inductors and capacitors to establish the required reverse bias voltage of -1/2*(Vreverse) at the anode and +1/2*(Vreverse) at the cathode.

However, I am concerned that the differing voltages across the capacitors connected to the anode and cathode might introduce errors into the differential sensing.

With this context in mind, I have a couple of questions:

  1. Is it acceptable to apply a direct 0V bias to the INN and INP pins to maintain them at the same voltage level for accurate differential sensing?
  2. In reviewing the AFE4490 schematic, I noticed the VCM_SHIELD pin. If I apply a 0V bias to this pin, will it ensure that INN and INP operate at the same voltage level?

Thank you very much for your assistance and insights on these matters.

Best regards,

  • Hello Hyeon-Gu,

    Thank you for your post.

    The bias voltage on INP and INN are set internally by the TIA front-end. The typical bias voltage is 900 mV. It is not possible to apply a direct 0V bias.

    The same internal bias voltage is available on the VCM pin of the AFE4490. This pin is an output and cannot be driven to 0V. The intention behind this pin is to drive the cable shield and reduce parasitic coupling. You can also route a trace from this pin in parallel with the INP and INN traces to act as a continuation of the cable shield on the PCB.

    Regards,

    Ryan

  • If I apply reverse bias to the photodiode and connect a Bias Tee structure to the anode and cathode, would this allow normal operation without causing a voltage difference between INN and INP?

    Additionally, is there a way to adjust the Vcm in the internal TIA of the AFE4490, or to keep the voltages of INN and INP constant to avoid being affected by the external input?

  • Hello Hyeon,

    The internal Vcm of the TIA cannot be adjusted.

    Would you mind sharing the model number of the photodiode you are trying to use?

    Regards,

    Ryan

  • https://drive.google.com/file/d/19JcejkV_Ax5I_lY3W3rxyOUqBgPeEtHD/view?usp=sharing

    We have not finalized the model of the photodiode yet, but one thing is certain: the photodiode will operate in reverse bias. Therefore, we plan to add a Bias Tee structure between the photodiode and the AFE4490 model’s TIA. We will apply half of Vr across the inductor to provide a DC voltage for reverse biasing the photodiode. Vinit will be set to either the VCM_SHIELD output voltage or GND.

    In this configuration, the two added capacitances will be chosen from the range of 10 pF to 1000 pF to ensure adequate DC blocking. The two inductors will be selected to be as small as possible to ensure effective DC biasing.

  • I hve one more question.

    The sentence "The bias voltage on INP and INN are set internally by the TIA front-end. The typical bias voltage is 900 mV." means:

    1. Is it referring to a voltage difference of 900 mV between INP and INN?
    2. Or does it mean that the voltage applied to both INP and INN is 900 mV, making the voltage difference between them 0?

    We would prefer if the voltage difference between INP and INN were 900 mV or higher.

  • Hello Hyeon-Gu,

    The differential voltage between INP and INN is 0V. The bias voltage of 900 mV is common to INP and INN, as set by the TIA.

    Regards,

    Ryan