Tool/software:
Hello,
My customer is testing the DAC39RF10-SP operation with a board they designed.
The confirmed the Tone signal output with the NCO mode of the DAC39RF10-SP.
In the next step, after setting up the JESD204 I/F for data transmission from the FPGA, I checked the status information as follows.
They are only using the lower 8 Lanes in LANE Mode3. The Lane Status and Lane Error Flags are the same for all 8 LANEs.
Please advice on how to debug to get the JESD link to connect properly.
Additionally, have you ever had any experience connecting the DAC39RF10-SP with Microchips' JESD LINK IP?
Thank you.
JH
