Tool/software:
We are running in SERIAL mode using both SDOA and SDOB, When setting the both MUXes to the fixed code output (0xAAAA and 0x5555). We get the correct codes on the first sample after a hard reset. But subsequent samples return the value 0xBB. We put a 1 second sleep between the reset and the acquisition. The CONFIGURATION register was written with 0x0 to turn off the sequencing/burst/oversampling features.
We a currently running slow timing (eg 5MHz SCLK) w 110KHz sample rate because we are using your EVAL demo board lashed to the FPGA demo board.
In the attached image, we are capturing 4 samples. CONVST is yellow, SDOA is green, SCLK is blue and pink is BUSY. You can see the SDOA pattern from the first sample is not the same as subsequent. Yet this is FIXED_CODE.
The behavior is also the same if we capture 16 samples (1 sample is OK, subsequent 0xBB).
If the MUXes are set to channels 0,0. We get a reasonable readings for the first samples but not subsequent.
