DAC8740H: power-up current

Hi David, 

Thanks for the question. We're looking into some solutions and will respond soon. 

Best,

Katlynne Jones

David,

How is the device locked up? Does it not respond to digital communication? is it drawing an unusual amount of current? I don't know of any particular start up time that is required for the DAC8740H.

If you are limiting the current that is being supplied to the 3.3V rail, I would worry about the initial power up being slow. In particular, you have about 40uF of bulk capacitance on the supply. I would consider removing the four 10uF capacitors first to see if that changes your startup. I would also use an oscilloscope to plot the 3.3V supply at start up with and without the extra capacitance.

Additionally, if you are limiting the supply current, I would raise the current limit to see if that helps.

Joseph Wu

hi Katlynee,

thanks a lot.

david_r

hi Joseph,

you're correct, i was suspicious about the slow power-on transient as well. so, i removed 10uF (C59,C62) and decreased 1uF (C57,C58) to 220nF.

but the problem is still there, see the oscilloscope capture.

trace #1: board 3V3_ISO1 power line 

looking into the 3V3_ISO1 power-up transient voltage curve, i can see that the voltage risen as expected to cca 1.7V and then the curve slope changed up to cca 2.2V, where the circuit starts to consume more than 3mA. thus, the circuit locks.

timewise, the first phase, ie. 0.0 to 1.7V, takes about 23ms.

the second phase, ie. 1.7V to 2.2V, takes about 29ms.

also, i've tried to power-up the circuit with DAC8740H /RESET pin connected to GND_ISO1, to prevent its logical section from uncontrolled switching. however, the result was the same. 

it looks like that the culprit is the analog section. am i right?

thanks for looking into this issue.

best regards,

david_r

David,

I think the reason for the extra current there is from an on-board LDO. For this device, there is an internal LDO that is used for powering the digital section to reduce the current used for that section. I think the LDO output is 1.8V and this can be seen at the REG_CAP pin. Additionally, there is another 1uF capacitor at that pin that is seen as an extra load.

Is there a reason you limit the total current at startup? Using 3mA at start up seem exceedingly small. I think you would need much more current at startup just to fill the bypass capacitors. Does this problem occur when you raise the current limit?

Joseph Wu

hi Joseph,

thanks a lot for your analysis. i think you're right. something happens, once min. voltage for digital section (1.7V) gets passed during the IC power up.

we limit the circuit total power to 3mA, since our HART device is powered from 4-20mA loop. i think that HART standard defines max. current a loop powered device can take from the loop is 3.5mA.

i'm wondering if you some data on DAC8740H power-up transient current consumption?

thanks a lot.

best regards,

david_r

hi Joseph,

yes, i've got the same feeling, ie. we need to re-view our power circuit.

thanks a lot for your time and suggestions.

best regards,

david_r