Tool/software:
Hello,
I have a few questions about the ADS127L21.
According to the figure shown above:
I am concerned about the maximum logic-low output voltage (VOL) for SDO/DRDY. I read that the maximum logic-low output voltage is 0.2 x IOVDD. My IOVDD is 5V, so VOL (maximum logic-low output voltage) would be 1V. Is this correct?
Or is this calculation specific for 1mA or 2mA current from the external pull-up resistor or current source?
For the SDO/DRDY internal RDS_on resistor calculation:
0.2 x 5V = 1V, meaning VOL_max = 1V at 2mA or 1mA, right? I will take 1mA current soure for this calculation.
The SDO/DRDY internal resistor would then be: 1V / 1mA = 1 kOhm correct?
According to the figure shown above:
I used a digital isolator, which has a pull-up current of 10µA at 5V (5V / 10µA = 500kΩ pull-up resistor), and the maximum logic low-level voltage is 0.8V.
When the ADC drives the output to a low state, the output voltage becomes (1kΩ / (500kΩ + 1kΩ)) x 5V = 0.01V. So, the output voltage is 0.01V, correct? Can we do the same calculations for the output as well?
I would appreciate a quick reply.
Thank you