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ADS1282-SP: Calculation of tDR after Reset

Hang Lin
Prodigy 20 points
Part Number: ADS1282-SP

Tool/software:

Dear all,

According to Datasheet section 7.8 Reset Timing Requirement, tDR after reset will consist of 1/fData (big portion) and 1/fClk (small portion).

I assume that the calculation for tDR after reset takes the default register setting into account, which is using SINC+FIR filter and data rate of 8000SPS

In our design, we want to use SINC filter only and a data rate of 8000SPS, this is done by configuring register CONFIG0 right after reset is triggered.

My question is, does the change of CONFIG0 shorten the tDR after reset? (My assumption is, just like the calculation of tDR after sync pulse, if only SINC filter is used, the tDR after reset will be calculated with 1/fClk portion, no 1/fData portion)

BR, Hang

  • 0
    TI__Mastermind 40980 points

    Hello Hang,

    Yes, after changing the filter mode and data rate by writing to the CONFIG0 register, and re-synchronizing the ADC by either toggling the SYNC pin or sending the SYNC command, the tDR for the SINC filter in Table 21 will now apply.  The tDR will now be much shorter time due to the much faster settling time of the SINC filter verses the SINC+FIR filter combination.

    Regards,
    Keith Nicholas
    Precision ADC Applications

  • 0 in reply to Keith Nicholas
    Prodigy 20 points

    Hi Keith,

    thanks for the quick reply. That's exactly what we did:

    reset ADC -> modify CONFIG0 to have SINC filter only -> re-sync ADC -> start to sample

    Modifying CONFIG0 will probably occur before tDR after reset goes into ready state.

    BR, Hang