This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADS131A02: Using async slave mode without interrupts

Part Number: ADS131A02

Tool/software:

We're using the ADS131A02 in async slave mode. However, we would prefer not to use an interrupt; we would rather just let the device convert at a reasonable rate (1 or 2kHz) and then perform a transaction (NULL command) to read it when we need the readings. This seems to be working, however occasionally we find the F_DRDY bit is set in the returned STAT_1 register.

What exactly does this bit signify? When is it set, are the associated ADC readings still valid (i.e. from the most recent complete conversion - in which case we can ignore this status bit), or might some bits be from one conversion and others be from a different conversion (in which case we will need to perform another transaction, or re-use the previous reading we took)?

  • Hi David,

    The F_DRDY bit in the STAT_1 register is set to indicate that the DOUT output shift register is not updated with the new conversion result, it means the new data are lost. Please see the following section in the datasheet. Using /DRDY is the best way to retrieve the latest conversion data. 

    BR,

    Dale