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ADC34RF52: CAL_STATUS Register

Part Number: ADC34RF52
Other Parts Discussed in Thread: ADC32RF55

Tool/software:

Hi team,


My customer is evaluating the board with the ADC34RF52, but the calibration has not been completed correctly and the analogue-to-digital conversion data is not output correctly.

The description of the CAL_STATUS register (address 0x298 on the CALIBRATION page) states that 0xE indicates a successful calibration, but the current read values are 0x1E or 0x6A. Can you let me know what these values indicate?

As mentioned in the previous thread, the grayed register value is set by copying the value directly.
If it is straddling pages like Table 8-11 in the datasheet, is it OK to set the register setting order in the left column, middle column, and right column neglecting straddling pages?

Best regards,
Kazuki Itoh

  • Kazuki,

    The table must be written in left column (straddling pages), the middle column (straddling pages), then the right column (straddling pages).

    Value of 0xE as the 4 LSB of the 0x298 register indicate calibration success, so reading back 0x1E is normal and the most common read back value actually. I’m not sure what a value of 0x6A means. I will have to ask the designers to see if there is any indication they can provide.

    Thanks, Chase

  • Hi Chase-san,

    Thank you for your response. Since the calibration has been successful, I would like to capture and check the data of the ADC core output in the register (digital page address 0x34). As for bit6 in the register (address 0x34 on the digital page), the field column says "MEM_STROBE", but the Description column contains a description of fast power down mode, so the contents seem to be incorrect. Should I set bit6 to 1 after bit[5:4] setting to capture ADC data? And in what format is the capture data stored? Is it the format set by bit3 (format) in register (digital page address 0x33)?

    Best regards,
    Kazuki Itoh

  • Hi Chase-san,

    I have one more question related to ADC data capture.

    The captured data is stored at addresses 0x800 to 0x87F, but in what order is it stored? 

    Best regards,

    Kazuki Itoh

  • Kazuki,

    I am checking on this and will get back with info once I find out. This will take 2-3 days.

    Thanks, Chase

  • Hi Kazuki,

    1. Reading the calibration success field is only applicable for foreground calibration modes and will not read successfully if wanting to use a background calibration mode. The ADC is always in calibrated state when using the background calibration mode, so there is no field to indicate the status, it is assumed to always be calibrated. As per the tables, below are the way to trigger single foreground calibration and background calibration.

    Foreground calibration:

    ADC32RF55.write(0x046,0x02)
    ADC32RF55.write(0x045,0x8A)
    ADC32RF55.write(0x045,0x0A)
    wait for (1.3*3e9/Fs) seconds
    ADC32RF55.read(0x298) = 0x1E

    Background calibration:

    ADC32RF55.write(0x046,0x02)
    ADC32RF55.write(0x046,0x03)
    ADC32RF55.write(0x045,0x0A)

    There is no register to readback to confirm that calibration is completed. The internal ADC core is swapped with the recently calibrated core every 13.5ms.

    2/3. There are some registers missing from the datasheet to do this feature. Find below sequence required for ADC34RF52. (I only got good results after programming the full bringup sequence and then following below steps)

    evm.adc.spi.write(0x05,0x04)
    evm.adc.spi.write(0xA0,0x00)
    evm.adc.spi.write(0xA2,0x00)
    evm.adc.spi.write(0x05,0x00)
    evm.adc.spi.write(0x04,0x01)
    evm.adc.spi.write(0x20,0x04)
    evm.adc.spi.write(0xAF,0x90)
    evm.adc.spi.write(0x04,0x01)
    evm.adc.spi.write(0x20,0x00)
    evm.adc.spi.write(0x04,0x00)
    evm.adc.spi.write(0x05,0x02)
    evm.adc.spi.write(0x34, channel) ### channel options: 0x00 = INA, 0x10 INB, 0x20: INC, 0x30: IND
    evm.adc.spi.write(0x34, channel + 0x40) ### Assert bit 6 by adding 0x40 to the channel value. This is what triggers the capture to buffer start.

    The resulting stored data is in 8-bit format due to register size, so sequential registers must be combined into a single 16-bit sample. The data structure of the samples is as follows:

    S0[15:8], S1[7:0], S1[15:8], S1[7:0], .... S63[15:8], S63[7:0]

    Here is the logic I am using in python in order to read and parse the data into 64 samples of 16-bit.

    READ_BACK_DATA = []
    for i in range(0x800, 0x87F+1):
        READ_BACK_DATA.append(evm.adc.spi.read(i))

    internal_buffer = []
    # Iterate over the data two elements at a time
    for i in range(0, len(READ_BACK_DATA), 2):
        # Get the high and low bytes
        high_byte = READ_BACK_DATA[i]
        low_byte = READ_BACK_DATA[i + 1]
       
        # Combine the high and low bytes into a 16-bit integer
        combined_value = (high_byte << 8) + low_byte
       
        # Into two's complement format
        if combined_value >= 0x8000:  # Check if the sign bit is set
            combined_value -= 0x10000  # Subtract 2^16 to get the negative value
           
        # Append the signed 16-bit integer to the list
        internal_buffer.append(combined_value)
    Thanks, Chase