DDS39RF10: TI JESD204C IP Interfacing with DDS39RF10 part

Dear TI Team,

We raised a thread regarding interfacing the DDS39RF10EVM with a Xilinx FPGA using TI’s JESD204C IP. 

Could you please reply to the thread at your earliest convenience?

Thank you

Best regards,
balu

Hi,

The DDS version of the device does not have a JESD interface.  It is a DDS chip only.

Regards,

Geoff

Dear sir,

Thank you for your reply.

However, I noticed in the datasheet that it mentions JESD interface support. Please find the relevant snapshot attached for your reference.

We are interested in generating noise signals in the GPS, 2.4 GHz, and 5.8 GHz bands. Could you kindly clarify if the DDS39RF10 can achieve this?

Additionally, we would like to know if it is possible to interface the DDS39RF10 with Xilinx FPGA evaluation boards to generate the required signals.

1. Can the DDS39RF10 be connected directly to Xilinx FPGA evaluation boards via an FMC connector?

2. Are there any recommended methods or guidelines for interfacing the DDS39RF10 with FPGA evaluation boards?

We appreciate your assistance and look forward to your guidance on this matter.

Best regards,

Banoth Balu

Dear Geoff Roth,

I would appreciate it if you could reply at your earliest convenience.

Regards
balu

Hey Balu, 

The DDS39RF10 has two SERDES lanes that are active. So JMODES 4, 5, 6 and 7 are supported. How much Instantaneous bandwidth did you need for your application?

Regards, 

Matt

Hey balu, 

Just a few things to add. The DDS39RF10 does not have its own EVM. What we recommend to customers is use the DAC39RF10EVM and just limit to 2 SERDES lanes. The GUI will be able to tell you how many SERDES lanes you are using based off the number of I/Q streams you are sending to the DAC as well as the JMODE. The DDS39RF10 and DAC39RF10 are the exact same die and will perform exactly the same with the exception of the active SERDES lanes. 

Dear Matthew,

We require an instantaneous bandwidth of 100 MHz

Regards,

Balu

Dear Matthew,

Thank you for your detailed response and additional insights regarding the DDS39RF10 and DAC39RF10.

To clarify, we are specifically interested in generating noise signals within the following frequency bands:

GPS band L1 and L5

2.4 GHz Band
5.8 GHz Band

We require an instantaneous bandwidth of 100 MHz for these signals. Could you kindly confirm if the DDS39RF10 can achieve noise signal generation within these bands while meeting our bandwidth requirements?

Additionally, we are considering using Xilinx FPGA evaluation boards for this purpose. Could you provide further guidance on the following:

Whether the DDS39RF10 or DAC39RF10 can interface directly with Xilinx FPGA evaluation boards via an FMC connector?

Recommended methods or guidelines for interfacing the DDS39RF10/DAC39RF10 with FPGA evaluation boards to generate the required signals.

Your assistance and expertise on this matter are greatly appreciated. We look forward to your guidance.

Best regards,
Balu

Dear Matthew,
please Replay....


regards 

Balu 

Hey Balu, 

This will work fine. Did you want the 2.4Ghz band on one channel and the 5.8GHz band on another channel? 

Dear sir,

we want both the signal on a single channel.

Dear Sir,
I apologise for the confusion created by mentioning DDS39RF10 instead of DAC39RF10. We have DAC39RF10EVM board with us. It will be great if you can make a reference design on KCU105 evaluation board for JESD interfacing with DAC39RF10EVM board. Our goal is to generate 2.4GHz and 5.8Ghz signal on a single channel. 

Regards, 
Balu