• State TI Thinks Resolved
  • Locked Locked
  • Replies 7 replies
  • Answers 2 answers
  • Subscribers 46 subscribers
  • Views 184 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADC12DL2500: Support on Minimum and Maximum Values for LVDS Differential output Voltage and Output Common mode Voltage

Narender Mariappan
Intellectual 280 points
Part Number: ADC12DL2500

Tool/software:

Hi,

In ADC12DL2500ACF, Only Typical Values are given for the differential output voltage (Default swing (HSM), Low swing (LSM)), Output Common mode Voltage for LVDS Output. We are interfacing ADC with XCVU23P FPGA. 

 

We would like to know the Minimum and Maximum values for the following to check compatibility with FPGA :

  1. Default swing (HSM).
  2. Low swing (LSM).
  3. VLVDS = 1.9 V.

FYR I have attached an image. Kindly check and respond.