Tool/software:
Hello,
Section 7.3.3 of the datasheet states that "The inputs are not prone to latch-up and can be asserted before the digital supply (VD) without any risk.".
However, in section 6.1 (Absolute Maximum Ratings), the 'Voltage on digital input and digital output pins to DGND" specifies a max of Vd + 0.3V. This seems to contradict with the statement from 7.3.3.
The specific reason why I am inquiring is for the case where VD is 0V but the SPI signals are at 3.3V. I want to ensure i will not cause an issue here or conduct through any steering diodes.