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AFE4300EVM-PDK: Questions Regarding AFE4300 for BCM Measurement

Part Number: AFE4300EVM-PDK
Other Parts Discussed in Thread: AFE4300

Tool/software:

Good day,

I hope you are doing well.

I have a few questions regarding the AFE4300, which I am using solely for BCM measurement. I am currently designing a PCB for BCM measurement in EIT and have noticed discrepancies between the AFE4300 datasheet and the EVM devkit design files. Could you assist in clarifying these differences?

Additionally, I need help understanding the calibration resistors for BCM.

I came across an Opensource academic article that discusses using the AFE4300 for EIT. The author utilizes all VSENSE and IOUT channels for BCM, but also uses certain calibration-related pins/registers during the EIT measurement cycle. I was under the impression that the calibration registers are exclusively for calibration, not general BCM applications. Could you clarify this? Specifically, I am referring to the ISW_MUX register (bits [9:8] and [1:0]) and VSENSE_MUX (bits [9:8] and [1:0]).

Furthermore, what is the difference between outputting BCM measurements using OUTP_FILT/OUTM_FILT versus OUTP_Q_FILT/OUTM_Q_FILT? These options are controlled by PERIPHERAL_SEL[4:0] in ADC_CONTROL_REGISTER2. I assume the choice depends on the BCM measurement method—could you confirm?

Lastly, why does the AFE4300 kit include additional amplifier circuitry for VSENSE?
I also have questions about the AFE4300 kit IOUT pins circuitry

I appreciate your time and assistance.

Best regards

Aidan

  • Hi Aidan, 

    Thank you for the query! Since the AFE4300's full datasheet is not publicly available. I am going to take this thread offline and email you to continue the support.

    Regards, KD

  • HI Katelyn, Thank you

  • Hi Katelyn, Do you have any feedback?
    I managed to find a few answers to my questions but, i still have questions about the chip. Especially about calibration and test impedances.
    I would like to know why an external amplifier circuit is used in the AFE4300 EVM kit schematic at the BCM receive channel. How was the test impedances and calibration loads chosen? 
    I'll be using the chip for EIT (Electrical Impedance Tomography) in FWR mode, the differential inputs and outputs will be multiplexed between 16 channels. It is quite a bit of pcb traces.
    Kind regards