Tool/software:
Hello,
1) can you help to review the schematic?
2) toggle mode register A and register B, where is it? It's not in register map.
3) toggle pin, only 3 pin, does it mean we can pick up 3 of 8 channel use it?
4) toggle function, can I use 1k clock connect to toggle pin to generate PWM?
Hi Liping,
3) toggle pin, only 3 pin, does it mean we can pick up 3 of 8 channel use it?
[Sanjay] - Please see the regmap for toggle config. You can assign each of the channel to any pin independently.
TOGGCONFIG0 and TOGGCONFIG1
Thanks,
Sanjay
point 2) , DACx has only one register for each channel ; If we toggle, we need two register A&B to switch.
But from below table, I can not find.
Hu Liping,
Please have a look at the figure 8-1. Each DAC channel has two internal register Reg-A (DAC Buffer Register) and Reg-B (DAC Active Register). Both of these registers are written via DACx Register. The procedure to write in Reg-A and Reg-B, is described in the section 9.4.1 Toggle mode. Please go through it once, it will be clear.
To update the toggle registers the following sequence should be followed:
1. Set DAC channel in synchronous mode and disable toggle mode for that channel
2. Write the desired Register A value to the DAC data register
3. Issue a DAC trigger signal to load Register A
4. Write the desired Register B value to the DAC data register
5. Enable toggle mode to load Register B
I hope this will clarify the doubt regarding the toggle mode Reg-A and Reg-B write.
Thanks,
Sanjay
