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ADC3662: CLKP, CLKM driver

Petar Gugutkov
Prodigy 10 points

Part Number: ADC3662

Tool/software:

Hi,

I want to connect ADC3662 to FPGA but I am struggling to find how can I drive sampling clock inputs CLKP, CLKM.

What logic levels and/or driver I must use to have best performance? I read the datasheet but there is no example of schematic with proper components.

Can you send more details and some examples?

Thank you

Petar

  • 0
    TI__Mastermind 44420 points

    Hi Petar,

    If you plan to get the performance of the ADC3662, then I would advise NOT to use the FPGA as a clock.

    These devices add too much noise and jitter to the ADC and ruin the performance.

    For more information on this point, please see the following link: www.ti.com/.../sbaa653.pdf

    You can interface to the clock pins of the ADC with clocking standards such as LVDS or dual sinewave or CML or PECL.

    If you need more clocking suggestions from TI, please let us know. We can certainly help you in this area as well.

    Thanks,

    Rob

  • 0 in reply to Rob Reeder
    Prodigy 10 points

    Hi Rob,

    Thank you for the link but I read that document.

    Our application is not very sensitive to jitter and it is very space limited which means I cannot have chip larger than 3mm x 3mm footprint.

    You mention LVDS signal but it is usually mV and do we need serial capacitors because of the mid point reference?

    Do you have any schematic/wiring examples with the different options and I am happy to consider any TI clocking solution like driver or interface translator which can be useful.

    You mention sinewave for clock!? how does it work with high skew requirement?

    Thank you

    Petar 

  • 0 in reply to Petar Gugutkov
    TI__Mastermind 44420 points

    Hi Petar,

    yes, use series caps to DC clock the VCM.

    Here is the interface line up: FPGA - diff traces - series cap on each diff trace - diff 100ohm term - ADC clock input pins.

    The series cap and 100ohm diff term should be located close to the ADC.

    For examples, you can look at the ADC366x EVM schematics. Simply download the design files for the EVM.

    For your sinewave question, do you mean slew or skew? No need to use this interface if you plan to use the FPGA in the end.

    Regards,

    Rob