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TSW1200EVM+ADS5400EVM

Other Parts Discussed in Thread: ADS5400EVM, ADS5400, CDCE62005

Hello Forum,

I'm hoping that someone else has worked with this combination of boards and can offer some advice. I've installed the software (TSW1200_v2p5) and connected the boards with power for the ADS5400EVM coming from the TSW1200 banana jacks. I connect a sine wave generator with varying frequency and amplitude signals to the J1 (AIN) connector on the ADS5400EVM. I select the ADS5400 as the ADC, Set the ADC Sampling Rate and Record Length and Capture a Time Domain signal. But what is displayed seems only slightly correlated with the signal that I supply. For example, the attached screen shot shows 4096 samples collected at 400Msps of a 50MHz 1 Vpp Sin wave.

Any ideas or suggestions? I have 2 sets of boards and they both behave similarly so whatever I am doing wrong is at least consistent.

 

Thanks for any help.

 

Larry Byars

  • Hi,

    It looks like the ADS5400 is not seeing the input signal.  It looks like the TSW1200 *is* seeing a clock signal from the ADS5400 or else the capture would have timed out with an error, so it seems the ADC is getting a clock input.  (Although I can't see from the screen shot that the sample clock is at the desired 400 MHz or not - just that there seems to be a clock.)

    But the input sine wave at the AIN input J1 does not appear to be getting to the analog inputs of the ADC.  The sample data appears pretty flat and at approximately mid-scale, although enough above mid-scale to not just be normal offset error.

    I would check the supply voltage coming from the TSW1200 to the ADS5400 EVM to be sure it is around 5V, and if not then consider supplying power from a 5V bench supply.  (Although I normally do power the ADS5400 from the TSW1200 so the voltage regulator is usually able to supply enough power.  The voltage regulator that supplies 5V out of the TSW1200 is rated for 1A.)  But using a bench supply for the 5V also lets you see how much current the EVM is drawing, in case there is a short or some other problem.

    Next I would use an oscilloscope to check the clock signal and the analog input signal at the inputs of the ADC.  The pads for the external termination resistor R85 make a handy place to touch a scope probe to see that there *is* a sine wave at the inputs to the ADC and to check that the biasing of the input signal places the midpoint of the swing at about 2.5V.  Likewise the clock signal should be seen to be biased about 2.5V when probed after the AC coupling caps C65 and C69.   If there is adequate power, adequate clock swing and an input signal biased about supply/2 then there should be sample data available from the EVM. 

    The ADS5400 EVM is stocked with the jumpers on the EVM set up in such a way that the EVM should work with the TSW1200 as it comes right out of the box.   If you can supply the serial nmber of the ADS5400 EVMs as it is inked onto the boards then I can supply the FFT plot that was saved for each when these boards were tested.

    One thing I notice in the screenshot is that your ADC Input Frequency does not reflect the desired 50MHz.  When I plug in 50MHz input frequency with 400Msps and 4096 samples I get a coherent frequency of 49.70703125M.  i think something else got entered in the ADC Input Frequency field, although that would have nothing to do with why the samples themselves look like there is no input to the ADC.   But once we get the sample data to process, you will want to get the proper value in this field.

    Regards,

    Richard P.

  • Hello Richard,

    Thank you for your response to my dilemma. Following your advice, we verified the +5 Volts on the ADC board and also were able to see our input signal at the ADC input using R85. However we were unable to detect the presence of a clock signal. I then rearranged my signals (I only have 1 frequency generator) and used the 240 MHz sine wave from my signal generator connected to the CLKIN input on the ADC board, J12. I was able to use a simple NIM pulse generator to provide a signal to the ADC input and was able to digitize the signal on all combinations of TSW1200 and ADS5400 EVM boards! Good news! Well, sort of. It means that the "internal" clock signal from the TSW1200 (I verified with all combinations of TSW1200 and ADC5400 boards) does not seem to be working. I understand that the test that is used to verify the ADC performance uses both the AIN and the CLKIN connections and so does not depend on the sample clock coming from the TSW1200.

    Would it be possible for you to verify that you can digitize a signal without using the CLKIN input at various sampling frequencies using the TSW1200 GUI? Ultimately, I will want to control the TSW1200 with my own code (yet to be written) to acquire and store signals from the ADC. I have seen some Matlab routines from other users but I'm not really a Matlab person (I write my own C programs and sometime use IDL for data display and manipulation). So eventually I will want some specifications on how to "talk" to the TSW1200 over the USB port, presumably as a character serial device.

    Again, thanks for your help.

    Regards,

    Larry Byars

  • Hi,

    The TSW1200 does not source a clock to the EVM of the data converter under test.  The data flow is as shown in the setup diagram as seen in the TSW1200 GUI as it comes up after installation - shown in the test selection Setup Diagram.

     

    The ADC needs both a sample clock and the analog input signal.  From that the ADC supplies the digital data with a clock to the TSW1200 and the TSW1200 uses that clock from the ADC to push samples into a FIFO.  There is a 200MHz crystal oscillator on the TSW1200 and the FPGA uses this to create a 250MHz internal system clock inside the FPGA.  The internal system clock is used to unload the FIFO and queue up sample data for the usb link up to the PC.    This is why the TSW1200 has a hard limit of 250Msps into its FIFOs, unless we store 2 samples at a time or in the case of the ADS5400 we store four samples at a time to support sample clock rates up to 1Gsps.

    But without a clock from the ADC, the sample data can't be pushed into the FIFOs.  And without a sample clock to the ADC, the ADC can't supply a clock to the TSW1200.

    Regards,

    Richard P.

  • Hello Richard,

    Happy New Year! Thank you for your help. It was our misunderstanding about the need for an external clock to drive the ADC - we now have a nice programmable clock (a CDCE62005) and are able to generate proper 1GHz clock and take data. I have examined the Matlab routines for reading data from the TSW1200 - ADS5400 and successfully wrote a C program that is able to take data also. I discovered one of your posts that explained the external trigger value for the ADS5400 (writing 0x30 to register 1 rather than 0x03) and will be using it to get some timing synchronization.

    I would like to request a copy of the verilog code for the TSW1200 FPGA using parallel LVDS DDR data format compatible with the ADS5400. Please send it to:

    larry dot byars at siemens dot com

    Thank you again for your help.

    Larry Byars