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ADC12DL3200EVM: ADC12DL500 SYSREF SIGNAL ON EXTERNAL CLOCK

Part Number: ADC12DL3200EVM
Other Parts Discussed in Thread: ADC12DL500, LMK04828, LMX2582

Tool/software:

I am designing a PCB that includes one ADC12DL500 ADC chip, using the ADC12DL3200EVM design as a reference, for use with the AC701 FPGA development board.

I will provide the ADC clock from an external source, while using the internal clocking structure of the AC701 FPGA board.
Therefore, I believe I do not need to use the LMK04828 or LMX2582 clocking ICs.

However, in the timing diagrams, I see that the SYSREF signal is typically provided by the LMK04828.

Do I need this SYSREF signal? and I'm a bit confused about how I should drive this signal externally if I want to use it.

The operating modes I plan to use, according to the timing diagrams in the ADC datasheet, are as follows:
Single or Dual Channel: LDEMUX = 0 or 1, DES_EN = 0 or 1, LALIGNED = 1