Tool/software:
Hi ADC experts,
My customer is looking into ADS1261 and running into two topics.
ADS1261 is sampling with 1200SPS while the FPGA which is connect by SPI is sampling the data with 1000SPS. They are not using a external clock.
Do you have an idea how the different data rates can be synchronized ?
Second topic is that they need two simultan sampling input where they want to use two ADS1261 in parallel. How can this two ADS1261 be synchronized ?
Best wishes
Olrik
