Tool/software:
Hi,
I am using DAC39J84 in the 841 configuration (on a custom board) and am receiving the FIFO read empty alarm on all 8 lanes.
Lane 0 (0x64) = 0x0002
Lane 1 (0x65) = 0x0002
Lane 2 (0x66) = 0x0002
Lane 3 (0x67) = 0x0002
Lane 4 (0x68) = 0x0002
Lane 5 (0x69) = 0x0002
Lane 6 (0x6A) = 0x0002
Lane 7 (0x6B) = 0x0002
What should I do to resolve them . Furthermore, I am sending a ramp signal from the FPGA but see no output. Is it due to this error?