ADS127L14: ADS127L14 Disable Digital filter for pulse input and help on external sync..

Thank you for your response Keith., 

Will you also confirm, in my design If I control the start pulse and data clock  synchronous to laser pulses  (Even in this case, I believe, I should plan SINC4, OSR12 only, which is OK)

• would I be able to get short pulse peak over 200kHz period?
• what would be minim detectable peaks
• Would START pulse to be retriggered to every frame OR first start alone  (we prefer for one time start and stop after burst capture completion)

Thanks,

Best Regards,

Varathu

Hello Varathu,

The SINC4 will require 4 data rate periods to fully settle to a step input (pulse).  Here is what the digital filter step response looks like.  RED (Series 1) is the step input, and BLUE (Series 2) is the output response.

Operating at OSR12, f-CLK=32.768MHz, will require a total time of 4*0.73us=2.93us to fully settle.  In order to read an input pulse magnitude correctly, the pulse width will need to be greater than 2.93us.  Pulse width's shorter than 2.93us can still be read, but the amplitude will be attenuated due to the SINC4 filter response.

You will want to use a single START pulse to synchronize to the input waveform to minimize settling time, otherwise, using a START pulse for every input pulse will further increase the filter settling time to 3.9us (SINC4 settling time PLUS 1us additional synchronization time).  If your pulse width will be greater than 3.9us, then you can use either approach.

Regards,
Keith

Hi Keith, 

In follow-up to this, I tried connecting the START pulse sync to my Analog in., as you explained, the higher the frequency., the data is clipped or scattered..

But as alternate, we transitioned  to SAR ADC, ADS8588S, wherein we also received the EVM (ADS8588SEVM-PDK), and synchronizing the CONSTA and CONVSTB signal.,, we observe the, the data loss for 40kHz when duty cycle is 10%..but as we increase, the the analog reading is improving.. same is the case for 200kHz.

Question:

a) We notice 3.8us typical for ADC conversion time, that means, minimum pulse width it can measure 3.8us, 10% dutycyle of 40kHz is 5us., but the analog read is much lower than applied.,

How much overhead time needed on top of tCONV timing?

b)Would I get right value, if I drive the output read clocks and controls, synchronous to input trigger?

c)Is there a sample and hold to detect the peak and latch the peak data on the output bus?

Thanks again for continued support., looking forward..

-Varathu

Hello Varathu,

The ADS8588S includes an internal PGA that limits the bandwidth based on the input range, with the maximum bandwidth of 24kHz.  This bandwidth is too low to capture a fast pulse. 

Below is a simulation using a 40kHz pulse generator, with 10%, 50%, and 90% duty cycle to illustrate the settling time effects.

The output of the PGA (ADC internal input) will only get to about 30% of the pulse value with a 10% duty cycle, 80% of the pulse value with a 50% duty cycle, and 99% of the pulse value with a 90% duty cycle.  These settling times do not take into account the ADC input acquisition time, which will result in further measurement errors.

Questions:
a) The input bandwidth limit of the internal PGA limits the measurement response.  

b) This is an analog input limitation of the ADC internal PGA, not primarily a timing related issue.

c)  If you aligned the CONVST rising edge to the end of the pulse, then you would minimize the error, but the above bandwidth limitations will always be the primary error for this specific device.

The ADS9817 has a similar input configuration, but is much faster, and has an internal PGA bandwidth of 400kHz.  Below is the resulting errors for this device.  With a 10% duty cycle pulse (pulse width of 2.5us), the resulting waveform response will be 99% of final value (1% error).  For 20% or higher duty cycle (longer pulse widths), the total error will be less than 0.1%.

Regards,
Keith

Thanks Keith,

Here are some follow-ups., 

a) Your explanation well aligned with architecture of this ADC, however, I get ADC matching to input amplitude as we give longer pulse period..

(this is illustration of actual FG data)

Below is the ADC redult, when pulse peak 10%, ~500ns

Below is the ADC redult, when pulse peak 90%, ~4.5us

With track-and-hold, we expect narrow pulse still be readable with right peak amplitude, could you clarify how this is missing in 10% case.

b) Our real application, is we expect varying peak pulse of ns period , but we have known reference to feed sync signal from laser, similar to what u see above

   Can you provide you proposal to construct acquisition network for our application., if 200kHz is challenging, we are good with 40kHz, please take this consideration

Note: Our application, only need to get the peak, not entire wave..

c)Will ADS9817 still prominent to pick the tiny peaks see above. And moreover, there is no start pulse input for each capture to sync our source, should the data interpreted by the host that is based on time instant laser is pulsing, is that the only option

What should be the SPI read clock without missing the peak Poulses?

d)ADS9813 - We like this ADC, since all 8 channel are simultaneous and no multiplexing, Is this same family of ADS9817.

Best Regards,

Varathu

Hello Varathu,

The bandwidth limit is internal to the ADC, at the internal ADC input, as shown here.

With a 200kHz pulse repetition rate, and pulse width of 500ns (10% duty cycle), the internal ADC input will only see an average input of about 10% of full scale.  The filter is basically converting the pulsed input to an average DC level, which is what the ADC converts.

When you increase the pulse width, the magnitude approaches the actual amplitude value.  At 90% duty cycle, you will get about 90% of the peak amplitude.

With such a low bandwidth filter, you are effectively capturing (peak pulse amplitude)*(duty cycle), or the average over the pulse repetition period of 200kHz.

In your case, I assume you need to measure multiple inputs at the same instance of time.  In this case, the ADS9817 will not work since it is not an 8-channel simultaneous sampling device.  The ADS9813 is the correct option, which supports simultaneous sampling of 8-channels.  Yes, it is the same family as the ADS9817, with similar input configuration, but offering 8 simultaneous channels.

In order to answer your other questions, what is the minimum pulse width that you need to measure the peak amplitude?

Regards,
Keith