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TSW12QJ1600EVM: TI-JESD204C-IP Number of Quads

Hiroshi Oinuma
Prodigy 30 points

Part Number: TSW12QJ1600EVM

Hi Experts!

I'm tring to run a TI-JESD204C-IP loopback simulation on Vivado(Reference Designe: zcu102_64b66b).
The 8-lane, 2-quads configuration described in section 6.2.1 of the User's Guide works without issues, but when changed to 8-lane, 3-quads as in section 6.2.2, the GTH transceiver doesn't work.

I think I need to change the transciver setting and NUM_QUADS parameter,
is it necessary to change any parameters?

  • 0
    Prodigy 30 points

    Upon checking the file, I found that the instance of gth_64b66b_rxtx.sv contains .gtrefclk00_in ({2{gt_refclk0_buf}}).
    I think that this is because the ZCU102 only has two GTH transcivers assigned to the FMC connector.
    After I changed it to 3bits, the simulation ran without any problems.

    If there are any misunderstandings or errors, please point them out.

  • +1 in reply to Hiroshi Oinuma
    TI__Expert 6260 points

    Hello Hiroshi,

    This is correct and the simulation will pass but it has some implications on the physical design that will be developed as well. Each xcvr quad of the FPGA will have its own PLL in order to generate the high clock rate needed to receive the data. Each of these PLLs needs to have a reference clock in order to lock to that clock rate (and the exact reference clock frequency can be configured in the xcvr wizards when instantiating the IP). This reference clock can come from two places, each quad can have its own physical reference clock, meaning that you must route that reference clock to each physical pin of the xcvr reference clock, or you can route a single reference clock to one of the xcvr ref clock pins and then internally share that clock to the other quads. code snippet you share above implies you are sharing a single clock to all the quads internally since there is only one refclk buffer, this is likely due to the physical clock routing on the zcu102 itself, but it is something to look out for in your final design.

    Thanks,

    Eric