ADS7066: Daisy Chain Communication Issue with ADS7066IYBHT

Hi Support Team,

Do you have any update?

Thanks,

Conor

Hello Connor, 

I have been looking into this on my end and have not been able to recreate this issue. After discussing with the internal team I wanted to ask if you could please share what the devices are serialized with, could you take a picture of the tops of the devices and share those with me? 

Thank you, 

Yolanda Gonzalez

Hi Yolanda,

We received additional information from the customer. The device marking on their ADS7066 units is “37AS311” (photo attached).

They also confirmed that even a single ADS7066 device shows corrupted SDO output when sending three or more 24-bit bursts, and this behavior is consistent across multiple boards. The customer kindly requests that TI capture the SDO waveform of the first ADC on the ADS7066EVM when sending five consecutive 24-bit bursts (via spiwrite) for comparison.

Best regards,

Conor

Hi Yolanda,

Thank you again for your support. We would like to request an additional and very important confirmation.

Could you please explicitly verify whether the communication on the EVM alone succeeds through the 3rd frame when writing GENERAL_CFG (0x80 / 0x8A)?

The reason for this request is that the issue is not limited to thier prototype board—our customer has reproduced the exact same behavior on their own EVM as well. Therefore, TI’s confirmation of whether the EVM by itself truly succeeded through the 3rd communication frame is critical for our troubleshooting. We would greatly appreciate it if you could re-evaluate the EVM standalone behavior and share the results.

ADC_measurement (1).pdf

This issue needs to be resolved within the next month, so I would appreciate it if you could give it as high a priority as possible.

Thanks,

Conor

Hi Support Team and Yolanda,

It's taking a while to respond, so please give me a first response by today.

Thanks,

Conor

Hello Connor, 

I was finally able to replicate this issue on my end. My deepest apologies for all of the delays. 

Here are some of my current findings: 

• There appears to be an issue configuring registers beyond the 2nd device. 
  • As you've shared and proved multiple times, by the SDO of the 2nd device/3rd device there are some unexpected results.
• Within the 1st and 2nd device, to actually configure 2 devices, writing 2xframes with both having register write commands should work fine 
  • but if adding 3rd consecutive register write command the previous issue appears even in the 2nd device.
    • It seems like having 2+ consecutive register writes pauses the device, the 2nd device in the chain outputs 16 bit, then 1xNOP, then the next 16 bits 
      • Similarly the 3rd device outputs 16 bits followed by 2xNOPs 
  • To be able to write the full 24 bits again and see them in the SDO1/SDI2 there needs to be 2xNOP (0x000000) between every register command 
• All this to say that the issue appears to be with the SPI register write
  • Since register reads only need 16 bits, this should still work but might not be as useful. 
• When it comes to data out, since this only requires 16 clocks as well, this worked well with the daisy chain function using multiple devices. 

*Disregard the small glitches on CS, they are not affecting the ADS7066

I will discuss this register write issue with the internal design team to see what could be causing this issue or if it is a limitation on the daisy chain functionality. 

Please allow me some time to dig deeper on this with the internal team. 

If possible, I would also prefer to work on this directly with you through email? please let me know and I can contact you. 

Best regards, 

Yolanda

Hi Yolanda,

I understand that you were able to reproduce the issue.
Thank you for continuing to investigate the root cause; we appreciate your support.
Email communication is perfectly fine for us.
Please contact me at the email address registered to my E2E account.

Thanks,

Conor