This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADS8688A: Saturation of ADC Input

Part Number: ADS8688A


Table 1 of the datasheet states that if the Input voltage is between the Vrange and Vovp, the ADC output will be saturated. It states that the device is internally progected but this state is not recommended for extended time.  Can you explain more of why this is not recommended? Will it eventually cause damage to the ADC? Will it affect the other inputs performance? Is it worse if the range is set to a range of 5.12V vs 10.24V?

I have situations where the op-amp will rail out (~+12VDC) due to a too high of an input which could be present for an extended time. I am trying to figure out if this will be an issue.

image.png

  • Hello Zach, 

    Those are some very good questions, thank you for asking!

    As an overview, below is the input overvoltage protection circuit schematic from the datasheet

    With the 1MΩ input resistors as well as the PGA gain setting resistors the input voltage is divided to ensure the voltage seen internally is smaller and within the device's capabilities (this is what allows the larger input ranges of the device while AVDD is only 5V).  Additionally there are some protection diodes that will activate if the divided voltage is larger than 0V to AVDD. 

    The overvoltage protection circuit gets activated when the input voltage is outside the input range, at this moment the diodes provide a low impedance path to divert the excess current and maintain a safe voltage level at the inputs.  Theoretically the diodes could this indefinitely, but in reality if the current is high enough this could lead to the devices heating up and possibly affecting the diodes themselves or other parts of the device. Mainly, the "not recommended for extended time" is because the device should not be in a saturated mode for long periods of time, and we recommend keeping it within recommended input ranges. 

    On the current dissipation, because the 1MΩ input resistors the input current can be rather small decreasing some concern. Additionally if the source impedance to the inputs are high impedance that decreases the concern further.

    I have situations where the op-amp will rail out (~+12VDC) due to a too high of an input which could be present for an extended time.

     

    In this situation, do you have an estimate of what the "extended time" would be?  

    What is the source impedance seen by the ADC? 

    Also, would this be with the device powered (AVDD = 5V) or would this be with AVDD floating? If the former, with a relative extended time.

    Is it worse if the range is set to a range of 5.12V vs 10.24V?

    The way the over voltage protection circuit works, the input current dependent on the input voltage is steady regardless of the input range.  But having a smaller input range configured does mean it goes into over protection mode sooner rather than later. 

    If I there is some time for this design, the alarm is not a requirement, and I could interest you, there is an upcoming variant of this device that will have an extended range up to ~12.228V. 

    Best regards, 

    Yolanda

  • Thank you. This answers my questions. I am unable to switch the ADC at this time that I'm using.