Part Number: ADS6422
Other Parts Discussed in Thread: SN65LVDS100
Hi! I am designing a pcb that interfaces an ADS6422 with a xilinx 7 series fpga. My question is related to external load capacitance of the adc. In the datasheet it is stated that in the case of not using internal termination on the adc, the maximum load capacitance is 5 pF. Nevertheless, i have read in xilinx docummentation that the FPGA input capacitance is 8 pF. I was wondering if i should place something (a buffer or other alternatives) between the adc and the fpga to drive the external load capacitance.
