We’re looking at the ADC16DV160 input interface and have a few questions.
An ideal setup for us would be to use a relatively low power, high linearity ADC driver with the ADC16DV160 ADC. Our present driver has low output impedance, but needs to see approximately 200ohm load in order to maintain its high dynamic range. Most of the applications circuits for ADC16DV160 show approximately 50 ohm in parallel with 42pF compensation capacitance at the ADC input, which loads the driver significantly.
We would appreciate it if National / TI could help us out with the following questions:
a) How much does the ADC16DV160 performance suffer with a circuit optimized for 200ohm impedance?
b) Is there more information available for optimizing the capacitance value at the ADC input? Currently all the circuits show 42pF capacitance, what is the lowest value of capacitance that would enable us to have 80+dB SFDR?