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ADS114S06: Does SBAA201A apply to the ADS114S06 family of parts?

Part Number: ADS114S06

SBAA201A (www.ti.com/.../sbaa201a.pdf) doesn't mention the ADS114S06 (or similar) part numbers, so I am just wondering if this design guide also applies to this part.

Specificially section 3.4 and table 3-1.

Additionally, section 3.4 mentions that the analog filter must completely settle after activating the current source.  But if we are doing continuous conversions, does the current source ever turn off?  If it is always on, I imagine this "settling time" is only applicable at the beginning of a continous conversion, correct?

Thanks!
-Bill

  • Hi Bill Argabright,

    Answers to your questions:

    SBAA201A (www.ti.com/.../sbaa201a.pdf) doesn't mention the ADS114S06 (or similar) part numbers, so I am just wondering if this design guide also applies to this part.

    Yes, section 3.4 about RC filter settling applies to the ADS114S06 (or any ADC for that matter) because this behavior is independent of the ADC operation i.e. an RC filter has a time constant regardless of what it's connected to or filtering

    Additionally, section 3.4 mentions that the analog filter must completely settle after activating the current source.  But if we are doing continuous conversions, does the current source ever turn off?  If it is always on, I imagine this "settling time" is only applicable at the beginning of a continous conversion, correct?

    Yes, the filter must settle after the current source is enabled or any signal is applied. However, once the signal is applied and settled, then you should be able to continuously sample that same signal and there should be no settling issues due to the external RC filter. Of course, your signal will be changing slightly, so it is not a pure DC input, but you could calculate using the standard RC filter response equations how much "error" there would be. I use "error" because if you are trying to measure a signal that is changing very slowly then the settling time should be insignificant. Of course a step input would require longer settling time

    The IDAC does not turn off until you tell it to, so as long as it is enabled during the conversion process there should be no issue with the external RC filter settling. If you are multiplexing through channels and need to switch the IDAC from one channel to the next e.g. for RTD measurements, then the settling time applies each time you switch

    -Bryan

  • We are connecting to a single 2-wire RTD and do not plan to be switching between any other channels (including not using any system monitor function).

    Oh, and that reminds me of another question.  We will be using a ratiometric set up with the bias resistor on the low-side as our external reference voltage (set to 1V).  It seems that we will be able to detect an open and short sensor without the use of the burn-out current sources.  Please confirm:

    • RTD short: the ADC will read close to 0, or at least well outside our valid temperature range.
    • RTD open: the ADC + input will put pulled high by the current source, and the ADC - input will be pulled low by the bias resistor.  However, no current will flow through the bias resistor, so there is no reference voltage for the ADC.  To detect this, we plan to use the built-in reference voltage detection and check for the flag periodically.

    Please confirm that the reference voltage detection is continuous and does NOT use the ADC, and therefore won't "interrupt" our otherwise continuous conversion mode.

    Thanks!

    -Bill

  • Hi Bill Argabright,

    Yes, a complete short and a complete open should be detectable using the methods you described. Here is an app note about wire break detection for more info: https://www.ti.com/lit/an/sbaa483/sbaa483.pdf?ts=1770414901778&ref_url=https%253A%252F%252Fwww.google.com%252F

    And yes, the VREF monitor on the ADS114S06 is continuous. This monitor sets a bit in the STATUS register, so you will need to read this register as often as your system requires to detect a fault. If this time period is greater than or equal to the data rate, you can always prepend the STATUS byte to the output data so you can read the status of this bit whenever you read back data from the ADC (and therefore don't need a separate, specific RREG for this task)

    See the SENDSTAT bit in the SYS register for more info about how to prepend the STATUS byte 

    -Bryan