This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

ADS114S06: How does the reference input get "sampled"?

Part Number: ADS114S06
Other Parts Discussed in Thread: STRIKE, ADS124S08

Does the ADS114S06 (and family) use a switched-capacitor structure for the reference input?  And is the reference input effectively "sampled" at the same time the analog input is "sampled"?

I am trying to understand the impact of external noise getting onto these nets, and I'm trying to figure out how to simulate this and analyze it.  Presently, we are seeing different noise on the ref+/- inputs than on the ain+/- inputs, so I cannot simply hand-waive it and say "its ratiometric!" :)

  • Hi Bill Argabright,

    Generally a delta-sigma ADC operates by sampling the reference input when the clock is low whereas the input is sampled when the clock is high (or vice versa)

    Can you provide more information about the behavior you are seeing? As well as how you are measuring the noise on each input, the difference in noise magnitude, what you have tried to do to fix this issue, etc.?

    -Bryan

  • There is no behavior I am seeing, explicitly, as I am in the analysis stage still. I need to analyze the impact of common-mode noise from a lightning strike coupling onto the cable bundle (of which the 2-wire RTD that the ADS114S06 is a part of, as is my PCB's return - which may or may not be tied to earth somewhere in the system).  The noise pulse is effectively a single-event pulse in the 100-200us range.  It is severe enough that I need to care not only about how the front-end discrete filter behaves (to determine if I violate the ADC's common-mode input range), but also model the ADC's sinc3 filter and its reference sampling.

    So you're telling me the ADS114S06's sampling of the input signal and reference voltage are 180deg out of phase.  Would I model it with a sinc3 filter (in which the reference is effectively "spread out" over the sample window)?  Or is it modeled like a sample-and-hold?

    I was also looking for information on the PGA's CMRR across frequency.  However, I saw a post from a couple years ago that said this information doesn't exist for this part.  Can you confirm this is still true?

    -Bill

  • Hi Bill Argabright,

    Presently, we are seeing different noise on the ref+/- inputs than on the ain+/- inputs, so I cannot simply hand-waive it and say "its ratiometric!" :)

    I interpreted this statement as you are measuring a noise imbalance between the inputs and VREF such that your results were no longer purely ratiometric. I guess you are actually just simulating this imbalance then? 

    Does your system just need to survive the strike? Or are you trying to design a system where ADC converts the input signal undisturbed (within a few % of course)? There is no issue violating the ADC VCM range assuming you don't violate the abs max and you don't care about the data during that timeframe e.g. during the 200us lightning strike

    We also just released an app note that deals with EMC issues with respect to the ADS124S08 measuring RTDs and thermocouples, maybe this will be helpful: https://www.ti.com/lit/an/sdaa150/sdaa150.pdf?ts=1771979076566&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FADS124S08

    I was also looking for information on the PGA's CMRR across frequency.  However, I saw a post from a couple years ago that said this information doesn't exist for this part.  Can you confirm this is still true?

    Correct, I don't have this information to share for the ADS114S06. 

    -Bryan