DAC3283 clock

Kiran,

The output frequency is based on the CDCE62005 PLL output frequency. The on-board reference is 19.2MHz, and if you wish to use the CDCE62005 with 640MHz, you will need to adjust the PLL dividers accordingly to reach 640MHz. You may not be able to get to the exact 640MHz frequency with 19.2MHz reference. Therefore, you may want to feed in an external reference that is easier to multiply to 640MHz. For instance, if you feed in a 20MHz reference and use the existing CDCE62005 settings for 614.4MHz clock, you will get the exact 640MHz output (multiple of 32x). 

The external reference configuration instruction can be found on the DAC3283 EVM user's guide. You can also configure the CDCE62005 in clock distribution (buffer) mode  where it buffers an external 640MHz clock. 

-KH