ADS8363

Alberto Biancalana

Other Parts Discussed in Thread: ADS8361EVM, ADS8361, ADS8363, ADS8363EVM, DAC8831

Hi,

I am working on a concept system composed by 6418EVM and 5k-6k adapter board with 1 DAC8331 EVM and 1 ADS8361EVM, each connected to one of the two McBSP interfaces of 6418.

On the ADC side I needed less than 125KS/s per channel on a single serial (MCBsp) interface and ADS8361 makes the work in mode IV (single serial interface).

Now there was modifications to the project and the signal frequency has doubled so I need up to 250KS/s per channel on the quad ADC.

As far as I know ADS8361, even with 2 x 500KSps ADCs, can't do that in mode IV with a single serial interface, due to the 10MHz clock limit.

It could only in mode 3 with both serial interfaces but this is not compatible with the EVM and with the single McBSP interface. Please correct me if I'm wrong.

So another chance is ADS8363. I read the User Manual for both the component and the EVM and it seems to me that:

- ADS8363 EVM should be 5-6k adapter board compatible (looking at schematics and photos and at some forum posts). But it is better to be quite sure because this is not stated in the manual.

- To get 4 channels at 250KSps, ADS8363 EVM should be compatible with 6418 EVM using mode II and mode IV with the single serial interface SD0 at 20MHz (half clock mode).

- Special mode 4 probably is not compatible with this configuration.

I have another question: I can't understand what is the difference between R[1:0] = 00 and R[1:0] = 11. The description is the same but I see in the signal drawings that both are used at different times. There is something I miss about?

Thanks in advance for any help.

Alberto

over 12 years ago

0 Tom Hendrick over 12 years ago

TI__Guru**** 172996 points

Hi Alberto,

You are correct - the ADS8361 cannot provide data faster than 125KSPS using the single serial output mode. The ADS8363EVM is compatible with the 5-6K Interface Board. Before going to the ADS8363, can I ask if you are updating the DAC8331 at the same data rate as the ADS8361? If so, you could potentially work in Mode III using the receive side of the McBSP used on the DAC8331. Basically what you would do is set the port to use an external clock and receive an external FS. Take the CLKx from the port talking to the ADS8361 and wrap it back to CLKr on the DAC8331 side. I did something similar to this myself a few years ago during a training session we had with our field apps engineers. Take a look at the attached document for a better idea of how this might work for your project and let me know what you think.

App2.doc

0 Alberto Biancalana over 12 years ago in reply to Tom Hendrick

Intellectual 380 points

Thanks Tom,

yes, I'll push the 8831 to 250KSps (not 8331, my mistake because 8331 sounds much smoother then 8831 in Italian and also in English I see)

I read the documentation and it's all clear, the DSP can get the B serial data through the RX side of McBSP1, not used by DAC8831, getting clock and sync from McBSP0 TX through the 5-6K interface.

This is a good solution and solves my problem with 8361, and, if needed (but I shouldn't, double the rate once is enough!) could be used with ADS8363 also.

Anyway 8363 got my attention, and I like the flexibility clean control interface, and I'll finish investigating.

If you remember with 8361 I had the problem of getting starting at a precise time and, possibly, not use the channel indication bits to save CPU and software to reorder the data, and you suggested me a way and an example to drive M0 for this.

Could I do the same with 8363 by getting, for instance, a single sample of channel CHA0 in manual mode II and then setting M0 = 1 and starting the full speed receive stream in mode IV without CI bits, especting CHA1, CHB0, CHB1, ..... and so on?

Or another way?

I had another question on 8363 about R[1:0] bits at 00 and at 11. Both configuration say "update of input selection bits C[1:0] only". Are they really the same thing or there is a difference?. I see in the examples that they are used in both configurations.

Thanks for your help always appreciated.

Alberto

0 Tom Hendrick over 12 years ago in reply to Alberto Biancalana

TI__Guru**** 172996 points

Hi Alberto,

Happy to hear that! The ADS8363 starts out in Mode I the same way as the ADS8361 does, so the 'synchronization' trick I showed you should work here as well. The R[1:0] bit combinations of 00 or 11 both do the same thing, internally, these bits feed an XNOR gate.

0 Alberto Biancalana over 12 years ago in reply to Tom Hendrick

Intellectual 380 points

Thanks Tom,

that close the circle.

Alberto

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ADS8363