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ADS62PXX Family of ADC

Other Parts Discussed in Thread: ADS62P42, ADS1675, REF5025

I can not seem to get the ADS62P42 adc to continue to work. It work just fine for a while but then the outputs stop working. I am using an FPGA to interface with it and thought that perhaps upon reconfiguration of the FPGA the pins did something unusual and caused the outputs to stop working. Has anyone else experienced this and is there something I am overlooking. Just for information the current draw stays the same while not working and I have tried using the control pins to start the ADC pins tristated and then use the configuration registers to over ride the control pins. This did not work either. Also used CMOS outputs and LVDS happened to both. Have tried 3 now.

  • Hi Brad,

    There are a couple of things to check.

    1. Using a scope, check the CLKOUT pins to see if there is a data clock coming out of the device. Please report back.

    2. Using a scope, make sure there is a clock going to the ADC, even after reconfiguring your FPGA.

    3. Is it possible that when reconfiguring the FPGA you are resetting the device by pulsing RESET high? Or are you using parallel mode (RESET held high from powerup)? Can you check the voltages at the CTRL1, CTRL2, and CTRL3 pins?

    Regards,
    Matt Guibord

  • Matt thank you for responding.

    To answer the questions

    1. There is no clock and no outputs on the pins, both in LVDS mode and in CMOS they either settle in logic high or logic low states.

    2. There is a clock going into the ADC.

    3. I have set the ctrl pins in both normal mode all low and initial power down mode 100 and used the internal registers to override the ctrl pins. 

    Yesterday after running for 5 minutes or so just checking the data from the FPGA the output pins stopped after trying to go from normal adc mode to the ramp test vector mode with an SPI write.

    I have never had a chips stop outputting, I have blown up several chips in my day but that was due to power errors this is very strange.

    Brad

  • Hi Brad,

    1. What frequency is the part running at?

    2. Is the part on your own board? Can you send the schematic/layout?

    3. I have a feeling the problem lies in the way you're writing the SPI. Can you send the registers that you're writing? Can you read from the device to verify what you wrote to it?

    4. Lastly, does the device run fine until you do a SPI write or does it eventually shut down with no interaction?

    Regards,
    Matt Guibord

  • Matt,

    1. The clock frequency of the ADC is 32MHz. The SPI data rate is 13.33 Mbps.

    2. It is our own board and in the zip file I included a pdf of the schematic the orcad max board file and the gerbers of the layers if you can open them.

    3. I have written to all the registers except the custom filter registers. I checked this morning on a chip that does not seem to work and can not get anything to come out of the sdout pin to read from the registers. I do not know but have a feeling that to begin with when the chip is working data does come out of this pin but can not confirm that right now.

    4. The device runs fine through several SPI writes. It responds to changing the decimation rate and watch the output clock go from 32 to 16 to 8 to 4 just like it is supposed to, changing the output test from all zeros to all ones to the ramp or alternating ones and zeros. It responds to changing from lvds to cmos outputs. It responds to starting the device in power down mode with the control lines then overriding those lines with the override bit the current draw changes as expected when I do that. My problem is that eventually it stops responding to any of those and the data and clock do not come out of the device like they had been doing. To answer the last question I have only noticed it shutting down after an SPI write, because I was looking at the output after telling the device to change what the output should be. Now that does not mean that that was what caused it but it might be. But again when the problem occurs the chip cannot just be powered down to get it to start working again the chip has to be replaced in order for it to work, but eventually the same thing happens to the new chip. I do not know how sensitive the SPI pins are on this chip but       I have never had a problem with anything else using SPI in the same manner from the same FPGA board that I am using now.

    A couple of comments about the schematic, I have shorted L2 and L7 for the 3.3 analog and 3.3 digital lines so they are connected together in trying to find the problem I took them out and the same thing happened with them in or out. I have run the voltage from just below 3V to 3.3V trying to see if the chip was somehow sensitive to the SPI from the FPGA that are running at 3.3V. This has all happened without connecting the analog buffers to the inputs of the ADC. Also this schematic and layout are the same as the one we used and had good success with the ADS1675 with only the ADC footprint and an additional analog buffer going to the other channel but the clock and power are as similar as we could keep them. It seems strange but the clock for the ADC is coming from another board that has NCO's on it to share a common clock so that is why it comes in through the SMA connector.

    Thanks,

    Brad

    ads62p42.zip
  • Hi Brad,

    Thanks for getting me that information. I took at look at the schematic and layout and had the following questions.

    1. Are you sure that U7 (REF5025) is not installed? This is a 2.5 V reference, which exceeds the absolute maximum voltage (2 V) of the Vcm pin. Please verify this is not installed.

    2. The clock comes through an SMA and travels along a decently long transmission line. Can you take a look at the clock signal at the ADC (after the AC blocking cap) to see what level it is and what the shape is? Look to see that the signal peak voltage does not exceed the absolute maximum voltage for the pin and verify that the signal does not cross the midpoint more than once in a period. A screenshot would be nice.

    3. I could not tell from your layout file, but is the ADC heat slug tied to a large copper ground plane? This device does need to be adequately cooled or it will overheat which may cause damage.

    4. If the device does not start working after cycling the power, then it seems that the device is being damaged. I believe you mentioned that the current draw did not change when the device stopped working. Can you verify this? Even the outputs no longer toggling should cause some current change. See if you can check the temperature of the device as well.

    Regards,
    Matt Guibord

  • Matt,

    1. It is not installed I guess it turned out to just be legacy from the schematic of the earlier board.

    2. I cannot get a screen shot right now but I have looked at the clock close to the chip and it seems to be ok shape wise. Depending on how I hold the probe the amplitude changes so it is hard to tell how big it is. It seems to be a sufficient size and I do not think it is too big. I did try to load it a little to get a smaller clock going into the adc on the last chip we tried but the same thing happened to it.

    3. It has a pad underneath it that is connected to the ground plane with 9 vias.

    4. As far as I can tell with the power supply that we have the current draw does not change. The power supply only reads out to the nearest 10 mA so that is probably why. A significant change can be seen when the device is put in power down mode and taken out of power down mode. Based purely on the unreliable touch test it does not seem to get too hot. I will see about getting our temp gauge and seeing what it reads.

    Thanks,

    Brad

  • Hi Brad,

    Sorry for not responding, I was on travel last week. I haven't seen anything alarming from what you've told me. Have you made any progress since your last post?

    Regards,
    Matt Guibord

  • No I have not gotten anywhere with it. We did get one of the evaluation modules though and I am going to see if I can get it to work properly.

  • Hi Brad,

    Thanks for the update. Would you mind sending me the SPI registers that you're writing?

    Regards,
    Matt Guibord